A light emitting module including a circuit board and a lighting emitting device thereon and including first, second, and third LED stacks each including first and second conductivity type semiconductor layers, a first bonding layer between the second and third LED stacks, a second bonding layer between the first and second LED stacks, a first planarization layer between the second bonding layer and the third LED stack, a second planarization layer on the first LED stack, a lower conductive material extending along sides of the first planarization layer, the second LED stack, the first bonding layer, and electrically connected to the first conductivity type semiconductor layers of each LED stack, respectively, and an upper conductive material between the circuit board and the lower conductive material, in which a width of an upper end of the upper conductive material is greater than a width of the corresponding upper conductive material.

Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

A thermosetting silicone resin composition contains the following components (A-1) to (D): (A-1) an alkenyl group-containing linear organopolysiloxane; (A-2) a branched organopolysiloxane shown by (R.sup.1.sub.3SiO.sub.1/2).sub.a(R.sup.2.sub.3SiO.sub.1/2).sub.b(SiO.sub.4/2).sub.c (1); (B-1) a branched organohydrogenpolysiloxane shown by (HR.sup.2.sub.2SiO.sub.1/2).sub.d(R.sup.2.sub.3SiO.sub.1/2).sub.e(SiO.sub.4/2).sub.f (2); (B-2) a linear organohydrogenpolysiloxane shown by (R.sup.2.sub.3SiO.sub.1/2).sub.2(HR.sup.2SiO.sub.2/2).sub.x(R.sup.2.sub.2SiO.sub.2/2).sub.y (3); (C) an adhesion aid which is an epoxy group-containing branched organopolysiloxane; and (D) a catalyst containing a combination of a zero-valent platinum complex with a divalent platinum complex and/or a tetravalent platinum complex. This provides a thermosetting silicone resin composition which causes little contamination at a gold pad portion and has excellent adhesiveness to a silver lead frame.

A thermosetting silicone resin composition contains the following components (A-1) to (D): (A-1) an alkenyl group-containing linear organopolysiloxane; (A-2) a branched organopolysiloxane shown by (R.sup.1.sub.3SiO.sub.1/2).sub.a(R.sup.2.sub.3SiO.sub.1/2).sub.b(SiO.sub.4/2).sub.c (1); (B-1) a branched organohydrogenpolysiloxane shown by (HR.sup.2.sub.2SiO.sub.1/2).sub.d(R.sup.2.sub.3SiO.sub.1/2).sub.e(SiO.sub.4/2).sub.f (2); (B-2) a linear organohydrogenpolysiloxane shown by (R.sup.2.sub.3SiO.sub.1/2).sub.2(HR.sup.2SiO.sub.2/2).sub.x(R.sup.2.sub.2SiO.sub.2/2).sub.y (3); (C) an adhesion aid which is an epoxy group-containing branched organopolysiloxane; and (D) a catalyst containing a combination of a zero-valent platinum complex with a divalent platinum complex and/or a tetravalent platinum complex. This provides a thermosetting silicone resin composition which causes little contamination at a gold pad portion and has excellent adhesiveness to a silver lead frame.

An electronic device includes a first structure body and a second structure body. The first structure body includes a first base body, a first bonding electrode and a first hard part. The second structure body includes a second base body, and a second bonding electrode. The first bonding electrode and the second bonding electrode are bonded to each other between the first base body and the second base body. The first hard part is located between the first base body and the second base body. The first hard part is positioned within an area in which the first bonding electrode is located when viewed along a first direction. The first direction is from the first base body toward the first bonding electrode. The first hard part has a higher hardness than the first bonding electrode.

A method may include forming a first atomic layer deposition (ALD) bonding layer on a surface of a first semiconductor device, and forming a second ALD bonding layer on a surface of a second semiconductor device. The method may include joining the first semiconductor device and the second semiconductor device via the first ALD bonding layer and the second ALD bonding layer. The method may include performing an annealing operation to fuse the first ALD bonding layer and the second ALD bonding layer and form a single ALD bonding layer that bonds the first semiconductor device with the second semiconductor device.

A method may include forming a first atomic layer deposition (ALD) bonding layer on a surface of a first semiconductor device, and forming a second ALD bonding layer on a surface of a second semiconductor device. The method may include joining the first semiconductor device and the second semiconductor device via the first ALD bonding layer and the second ALD bonding layer. The method may include performing an annealing operation to fuse the first ALD bonding layer and the second ALD bonding layer and form a single ALD bonding layer that bonds the first semiconductor device with the second semiconductor device.

A semiconductor device such as a chip-scale package is provided. Aspects of the present disclosure further relate to a method for manufacturing such a device. According to an aspect of the present disclosure, a semiconductor device is provided that includes a conformal coating arranged on its sidewalls and on the perimeter part of the semiconductor die of the semiconductor device. To prevent the conformal coating from covering unwanted areas, such as electrical terminals, a sacrificial layer is arranged prior to arranging the conformal coating. By removing the sacrificial layer, the conformal coating can be removed locally. The conformal coating covers the perimeter part of the semiconductor die by the semiconductor device, in which part a remainder of a sawing line or dicing street is provided.

A semiconductor device such as a chip-scale package is provided. Aspects of the present disclosure further relate to a method for manufacturing such a device. According to an aspect of the present disclosure, a semiconductor device is provided that includes a conformal coating arranged on its sidewalls and on the perimeter part of the semiconductor die of the semiconductor device. To prevent the conformal coating from covering unwanted areas, such as electrical terminals, a sacrificial layer is arranged prior to arranging the conformal coating. By removing the sacrificial layer, the conformal coating can be removed locally. The conformal coating covers the perimeter part of the semiconductor die by the semiconductor device, in which part a remainder of a sawing line or dicing street is provided.