Patent classifications
H01L2924/09701
Semiconductor integrated circuit device
In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.
Integrated Circuit Package Including Miniature Antenna
The present invention relates to an integrated circuit package comprising at least one substrate, each substrate including at least one layer, at least one semiconductor die, at least one terminal, and an antenna located in the integrated circuit package, but not on said at least one semiconductor die. The conducting pattern comprises a curve having at least five sections or segments, at least three of the sections or segments being shorter than one-tenth of the longest free-space operating wavelength of the antenna, each of the five sections or segments forming a pair of angles with each adjacent segment or section, wherein the smaller angle of each of the four pairs of angles between sections or segments is less than 180 (i.e., no pair of sections or segments define a longer straight segment), wherein at least two of the angles are less than 115, wherein at least two of the angles are not equal, and wherein the curve fits inside a rectangular area the longest edge of which is shorter than one-fifth of the longest free-space operating wavelength of the antenna.
VIAS AND CONDUCTIVE ROUTING LAYERS IN SEMICONDUCTOR SUBSTRATES
Through vias and conductive routing layers in semiconductor substrates and associated methods of manufacturing are disclosed herein. In one embodiment, a method for processing a semiconductor substrate includes forming an aperture in a semiconductor substrate and through a dielectric on the semiconductor substrate. The aperture has a first end open at the dielectric and a second end opposite the first end. The method can also include forming a plurality of depressions in the dielectric, and simultaneously depositing a conductive material into the aperture and at least some of the depressions.
Packaged semiconductor components having substantially rigid support members
Packaged semiconductor components having substantially rigid support member are disclosed. The packages can include a semiconductor die and a support member proximate to the semiconductor die. The support member is at least substantially rigid. The packages can further include an adhesive between the support member and the semiconductor die and adhesively attaching the support member to the semiconductor die. The packages can also include a substrate carrying the semiconductor die and the support member attached to the semiconductor die.
Illumination apparatus
An illumination apparatus comprises a plurality of LEDs aligned to an array of directional optical elements wherein the LEDs are substantially at the input aperture of respective optical elements. An electrode array is formed on the array of optical elements to provide at least a first electrical connection to the array of LED elements. Advantageously such an arrangement provides low cost and high efficiency from the directional LED array.
MILLIMETER WAVE LTCC FILTER
The present disclosure provides a millimeter wave LTCC filter including system ground layers and metalized vias; two first perturbation metallized vias provided in a first substrate integrated waveguide unit and two second perturbation metallized vias provided in a second substrate integrated waveguide unit; the two first perturbation metallized vias are symmetrically provided on a first diagonal of the first closed resonant cavity with respect to a geometric center of the first closed resonant cavity; the two second perturbation metallized vias are symmetrically provided on a second diagonal of the second closed resonant cavity with respect to a geometric center of the second closed resonant cavity, and the first diagonal and the second diagonal are orthogonal to each other; a first port and a second port. Compared with the related art, the millimeter wave LTCC filter of the present disclosure is small in volume, large in bandwidth, and low in loss.
SEMICONDUCTOR PACKAGE INCLUDING ORGANIC INTERPOSER
A semiconductor package including an organic interposer includes: the organic interposer including insulating layers and wiring layers formed on the insulating layers; a stiffener disposed on the interposer and having a through-hole; a first semiconductor chip disposed in the organic through-hole on the organic interposer; a second semiconductor chips disposed adjacent to the first semiconductor chip in the through-hole on the organic interposer; and an underfill resin filling at least portions of the through-hole and fixing the first semiconductor chip and the second semiconductor chip, wherein the connection pads of the first semiconductor chip and the second semiconductor chip are electrically connected to each other through the wiring layers of the organic interposer.
THREE-DIMENSIONAL PACKAGE STRUCTURE
A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The three-dimensional package structure is applicable to a POL, (Point of Load) converter.
Semiconductor device
The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101, an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a side face of the first semiconductor element 113, and a second semiconductor element 111 provided on a face on the other side of the interconnect component 101. The interconnect component 101 has a constitution where an interconnect layer 103, a silicon layer 105 and an insulating film 107 are sequentially formed. The interconnect layer 103 has a constitution where the interconnect layer 103 has a flat plate shaped insulating component and a conductive component extending through the insulating component. The first semiconductor element 113 is electrically connected with the second semiconductor element 111 through the conductive component.
Illumination apparatus
An illumination apparatus comprises a plurality of LEDs aligned to an array of directional optical elements wherein the LEDs are substantially at the input aperture of respective optical elements. An electrode array is formed on the array of optical elements to provide at least a first electrical connection to the array of LED elements. Advantageously such an arrangement provides low cost and high efficiency from the directional LED array.