A method for manufacturing a semiconductor light emitting device package includes forming a light emitting structure including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer sequentially stacked on a growth substrate, forming a reflective layer on a first surface of the light emitting structure corresponding to a surface of the second conductivity-type semiconductor layer, forming bumps on the first surface, the bumps being electrically connected to the first or second conductivity-type semiconductor layer and protruding from the reflective layer, bonding a support substrate to the bumps on the first surface, removing the growth substrate, bonding a light transmissive substrate coated with a wavelength conversion layer to a second surface of the light emitting structure from which the growth substrate is removed, and removing the support substrate. The reflective layer covers at least portions of side surfaces of the light emitting structure and the bumps.

A display device manufacturing apparatus includes a first reservoir accommodating a solvent; a second reservoir accommodating a light emitting element; a mix chamber accommodating an ink including the solvent and the light emitting element ; a first channel connecting the first reservoir and the mix chamber; a second channel connecting the second reservoir and the mix chamber; and a counter that obtains information on a number of the light emitting elements that are moved in the second channel.

A self-emission type display including a carrier substrate, a light-emitting element, a first electrode, and a second electrode is provided. The light-emitting element is disposed on the carrier substrate and has a first pad and a second pad. The first electrode has a plurality of first stripe portions electrically connected to a first electric potential. The first pad of the light-emitting element is electrically connected to the carrier substrate through at least one first strip portion. The second electrode has a plurality of second stripe portions electrically connected to a second electric potential. The first electrode and the second electrode are separated from each other. The second pad of the light-emitting element is electrically connected to the carrier substrate through at least one second strip portion. The first electric potential is different from the second electric potential.

A semiconductor structure includes a substrate, a plurality of micro semiconductor devices and a fixing structure. The micro semiconductor devices are disposed on the substrate. The fixing structure is disposed between the substrate and the micro semiconductor devices. The fixing structure includes a plurality of conductive layers and a plurality of supporting layers. The conductive layers are disposed on the lower surfaces of the micro semiconductor devices. The supporting layers are connected to the conductive layers and the substrate. The material of each of the conductive layers is different from the material of each of the supporting layers.

A display device made of a TFT substrate and a driver IC is configured to eliminate bad connection between them. On the driver IC connected to the TFT substrate, a first principal surface has first bumps formed along a first side having a first edge and second bumps formed along a second side opposite to the first side and having a second edge. The TFT substrate has first terminals and second terminals connected to the first and the second bumps, respectively. On a cross section taken perpendicularly to the first and the second sides, the first principal surface has a first area between the first and the second bumps and a second area between the second bumps and the second edge. The first and the second areas are bent toward the TFT substrate.

The interposer-chip-arrangement comprises an interposer (1), metal layers arranged above a main surface (10), a further metal layer arranged above a further main surface (11) opposite the main surface, an electrically conductive interconnection (7) through the interposer, the interconnection connecting one of the metal layers and the further metal layer, a chip (12) arranged at the main surface or at the further main surface, the chip having a contact pad (15), which is electrically conductively connected with the interconnection, a dielectric layer (2) arranged above the main surface with the metal layers embedded in the dielectric layer, a further dielectric layer (3) arranged above the further main surface with the further metal layer embedded in the further dielectric layer, and an integrated circuit (25) in the interposer, the integrated circuit being connected with at least one of the metal layers (5).

A light emitting device includes a carrier, a plurality of light emitting diode chips and a plurality of buffer pads. Each light emitting diode chip includes a first type semiconductor layer, an active layer, a second type semiconductor layer, a via hole and a plurality of bonding pads. The via hole sequentially penetrates through the first type semiconductor layer, the active layer and a portion of the second type semiconductor layer. The first type semiconductor layer, the active layer, the second type semiconductor layer and the via hole define a epitaxial structure. The buffer pads are disposed between the carrier and the second type semiconductor layer, wherein the buffer pads is with Young's modulus of 2˜10 GPa, the second bonding pad is disposed within the via hole to contact the second type semiconductor layer, and the epitaxial structure is electrically bonded to the receiving substrate through the bonding pads.

A semiconductor device comprising a stack of semiconductor chips. The semiconductor chips have an electrically active side and an opposite electrically inactive side. The active sides bordered by an edge having first lengths and the inactive sides bordered by a parallel edge having a second lengths smaller than the first lengths. A substrate has an assembly pad bordered by a linear edge having a third length equal to or smaller than the first lengths. The inactive chip side attached to the pad so that the edge of the first lengths are parallel to the edge of the third length. The active side of the attached chip forms an overhang over the pad, when the third length is smaller than the first lengths.

A semiconductor package includes a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, a first semiconductor structure and a second semiconductor structure that are on the first semiconductor chip and spaced apart from each other across the second semiconductor chip, and a resin-containing member between the second semiconductor chip and the first semiconductor structure and between the second semiconductor chip and the second semiconductor structure. The semiconductor package may be fabricated at a wafer level.

According to one embodiment, a semiconductor device includes a first substrate. A first semiconductor chip having a first surface facing the first substrate and a second surface opposite the first surface. The first semiconductor chip has electrodes on the first surface and is coupled to the first substrate. A first resin layer is provided at least between the first substrate and the first semiconductor chip, and covers the second surface. The first resin layer has an upper surface substantially flatter than the second surface.