Provided is an optical modulating device including a substrate including first and second trenches, a phase modulator in a region of the substrate, the phase modulator including an undoped region provided between the first and the second trenches, and first and a second doped regions which are apart from each other with the undoped region therebetween, wherein the phase modulator is configured to modulate a phase of light traveling through the undoped region based on a first electrical signal applied to the phase modulator, an amplifier including a first doped layer, a quantum well layer, a clad layer, and a second doped layer sequentially on the substrate, the amplifier overlapping at least a portion of the phase modulator and being configured to amplify the light based on a second electrical signal applied to the amplifier, and an insulating layer between the phase modulator and the amplifier.

Provided in a method of fabricating an optical element array including providing a silicon substrate, providing a first element layer on the silicon substrate, the first element layer including a plurality of passive optical elements, providing a plurality of semiconductor blocks on a compound semiconductor wafer, providing semiconductor dies by dicing the compound semiconductor wafer by the plurality of semiconductor blocks, and providing a second element layer by providing the semiconductor dies on the first element layer, each of the plurality of semiconductor blocks contacting at least one corresponding passive optical element from among the plurality of passive optical elements.

An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer.

A device including a non-polarization material includes a number of layers. A first layer of silicon (100) defines a U-shaped groove having a bottom portion (100) and silicon sidewalls (111) at an angle to the bottom portion (100). A second layer of a patterned dielectric on top of the silicon (100) defines vertical sidewalls of the U-shaped groove. A third layer of a buffer covers the first layer and the second layer. A fourth layer of gallium nitride is deposited on the buffer within the U-shaped groove, the fourth layer including cubic gallium nitride (c-GaN) formed at merged growth fronts of hexagonal gallium nitride (h-GaN) that extend from the silicon sidewalls (111), wherein a deposition thickness (h) of the gallium nitride above the first layer of silicon (100) is such that the c-GaN completely covers the h-GaN between the vertical sidewalls.

This photonic transmitter includes a layer made of dielectric material, a sublayer made of doped III-V crystalline material extending directly over the layer made of dielectric material, a laser source including the sublayer made of doped III-V crystalline material, a modulator including a waveguide formed by proximal ends facing first and second electrodes and that segment of the layer made of dielectric material which is interposed between these proximal ends, and a zone composed only of one or more solid dielectric materials, which extends from a distal end of the second electrode to a substrate, and under the entirety of the distal end of the second electrode.

A light emitting device includes a laminated structure having a plurality of columnar parts, wherein the columnar part includes a first semiconductor layer, a second semiconductor layer different in conductivity type from the first semiconductor layer, and a third semiconductor layer disposed between the first semiconductor layer and the second semiconductor layer, the third semiconductor layer includes a light emitting layer, and the second semiconductor layer includes a first portion, and a second portion which surrounds the first portion in a plan view from a laminating direction of the first semiconductor layer and the light emitting layer, and is lower in impurity concentration than the first portion.

The present invention provides one or more injection-lockable whistle-geometry semiconductor ring lasers, which may be cascaded, that are integrated on a common silicon-on-insulator (SOI) substrate with a single-frequency semiconductor master laser, wherein the light output from the semiconductor master laser is used to injection-lock the first of the semiconductor ring lasers. The ring lasers can be operated in strongly injection-locked mode, while at least one of them is subjected to direct injection current modulation.

The methods of manufacture of GeSiSn heterojunction bipolar transistors, which include light emitting transistors and transistor lasers and photo-transistors and their related structures are described herein. Other embodiments are also disclosed herein.

A method of producing a heterogeneous photonic integrated circuit includes integrating at least one III-V hybrid device on a source substrate having at least a top silicon layer, and transferring by transfer-printing or by flip-chip bonding the III-V hybrid device and at least part of the top silicon layer of the source substrate to a semiconductor-on-insulator or dielectric-on-insulator host substrate.

A method of producing laser bars or semiconductor lasers includes providing a carrier composite to form a plurality of carriers for the laser bars or for the semiconductor lasers, providing a semiconductor body composite including a common substrate and a common semiconductor layer sequence grown thereon, forming a plurality of separation trenches through the common semiconductor layer sequence such that the semiconductor body composite is divided into a plurality of semiconductor bodies, applying the semiconductor body composite to the carrier composite such that the separation trenches face the carrier composite, thinning or removing the common substrate, and singulating the carrier composite into a plurality of carriers, wherein a plurality of semiconductor bodies are arranged on one of the carriers, and the semiconductor bodies arranged on one common carrier are laterally spaced apart from one another by the separation trenches.