Methods of manufacturing a heterojunction bipolar transistor are described herein. An exemplary method can include providing a base/emitter stack, the base/emitter stack comprising a substrate, an etch stop layer over the substrate, an emitter contact layer over the etch stop layer, an emitter over the emitter contact layer, and/or a base over the emitter. The exemplary method further can include forming a collector. The exemplary method also can include wafer bonding the base to the collector. Other embodiments are also disclosed herein.

Integrated circuitry is fabricated from semiconductor layers formed on a substrate, which include a p-type gate-all-around layer structure that includes a plurality of quantum well structures formed between a pair of p-type thin doped layers spaced vertically from one another. A p-type layer is formed above the p-type gate-all-around layer structure. An etch operation exposes the p-type layer. P-type ions are implanted into the exposed second p-type layer to a depth that extends through the p-type gate-all-around layer structure and contacts the p-type thin doped layers of the p-type gate-all-around layer structure. A gate electrode of an n-channel HFET device is formed in contact with the ion-implanted p-type region(s). Source and drain electrodes of the n-channel HFET device are formed in contact with ion-implanted n-type regions that contact the plurality of quantum well structures of the p-type gate-all-around layer structure. P-channel GAA HFET devices, complementary BICFET devices, stacked complementary HFET devices and circuits and/or logic gates based thereon, and a variety of optoelectronic devices and optical devices can also be formed as part of the integrated circuitry.

A transistor for emitting laser with a fixed frequency includes a first region, a second region, at least one quantum well, and a third region. The at least one quantum well is installed in the second region, and the second region is coupled between the first region and the third region. When one of the first region, the second region, and the third region receives two signals, or two of the first region, the second region, and the third region receive the two signals respectively, the at least one quantum well emits the laser with the fixed frequency.

A laser diode including a double heterostructure comprising a top layer, a buffer layer formed on a substrate, and an intrinsic active layer formed between the top layer and the buffer layer. The top layer and the buffer layer have opposite types of conductivity. The active layer has a bandgap smaller than that of the buffer layer or the top layer. The double heterostructure includes Ge, SiGe, GeSn, and/or SiGeSn materials.

A photonic crystal surface-emitting laser includes a light emitting module and a driving module. The light emitting module includes a photonic crystal layer, an active light emitting layer on a side of the photonic crystal layer, a first electrode on a side of the active light emitting layer facing away from the photonic crystal layer, and a second electrode partially on the side of the active light emitting layer facing away from the photonic crystal layer. The driving module makes electrical contact with surfaces of the first electrode and the second electrode facing away from the photonic crystal layer. The driving module outputs driving signals to the first electrode and the second electrode to drive the active light emitting layer to generate photons. The photons are incident into the photonic crystal layer to generate a laser light through oscillation on Bragg diffraction. An optical system is also disclosed.

Integrated circuitry is fabricated from semiconductor layers formed on a substrate, which include at least one n-type layer, an inverted p-type modulation doped quantum well (mod-doped QW) structure, a non-inverted n-type mod-doped QW structure, and at least one p-type layer including a first P+-type layer formed below a second P-type layer. An etch operation exposes the second p-type layer. P-type ions are implanted into the exposed second p-type layer. A gate electrode of a n-channel HFET device is formed in contact with the p-type ion implanted region. Source and drain electrodes of the n-channel HFET device are formed in contact with n-type ion implanted regions formed in contact with the n-type mod-doped QW structure. P-channel HFET devices, complementary BICFET devices, stacked complementary HFET devices and circuits and/or logic gates based thereon, and a variety of optoelectronic devices and optical devices can also be formed as part of the integrated circuitry.

Methods of manufacturing heterojunction bipolar transistors are described herein. An exemplary method can include providing an emitter/base stack comprising a substrate, a base over the substrate, and/or an emitter over the base. The exemplary method further can include forming a collector. The exemplary method also can include wafer bonding the base to the collector. Other embodiments are also disclosed herein.

Embodiments of the disclosure provide a system for controlling laser pulses emitted by an optical sensing device. The system may include a laser emitter configured to emit a plurality of laser pulses, a power source configured to deliver electrical currents to the laser emitter, and a control circuit configured to deliver electrical currents from the power source to the laser emitter. The control circuit may include a first control path configured to deliver a first electrical current rising at a first rate from the power source to the laser emitter to emit a first laser pulse. The control circuit may also include a second control path configured to deliver a second electrical current rising at a second rate from the power source to the laser emitter to emit a second laser pulse following the first laser pulse. The second rate may be higher than the first rate.

A laser diode including a double heterostructure comprising a top layer, a buffer layer formed on a substrate, and an intrinsic active layer formed between the top layer and the buffer layer. The top layer and the buffer layer have opposite types of conductivity. The active layer has a bandgap smaller than that of the buffer layer or the top layer. The double heterostructure includes Ge, SiGe, GeSn, and/or SiGeSn materials.

Wafer bonded GaN monolithic integrated circuits and methods of manufacture of wafer bonded GaN monolithic integrated circuits and their related structures for electronic and photonic integrated circuits and for multi-functional integrated circuits, are described herein. Other embodiments are also disclosed herein.