A transistor for emitting laser with a fixed frequency includes a first region, a second region, at least one quantum well, and a third region. The at least one quantum well is installed in the second region, and the second region is coupled between the first region and the third region. When one of the first region, the second region, and the third region receives two signals, or two of the first region, the second region, and the third region receive the two signals respectively, the at least one quantum well emits the laser with the fixed frequency.

A light-emitting component includes a light-emitting element, a driving thyristor, and a light-absorbing layer. The light-emitting element emits light of a predetermined wavelength. The driving thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-absorbing layer is disposed between the light-emitting element and the driving thyristor such that the light-emitting element and the driving thyristor are stacked, and absorbs light emitted by the driving thyristor.

A light-emitting device includes a substrate including a photonic cavity and configured to function as a gate, an active layer including a two-dimensional material, a first conductive contact, and a second conductive contact. The wavelength range of light generated by the light-emitting device may be narrowed based on the photonic cavity being included in the substrate, and the intensity and wavelength range of the generated light may be controlled based on the substrate functioning as a gate.

Integrated circuitry is fabricated from semiconductor layers formed on a substrate, which include at least one n-type layer, an inverted p-type modulation doped quantum well (mod-doped QW) structure, a non-inverted n-type mod-doped QW structure, and at least one p-type layer including a first P+-type layer formed below a second P-type layer. An etch operation exposes the second p-type layer. P-type ions are implanted into the exposed second p-type layer. A gate electrode of a n-channel HFET device is formed in contact with the p-type ion implanted region. Source and drain electrodes of the n-channel HFET device are formed in contact with n-type ion implanted regions formed in contact with the n-type mod-doped QW structure. P-channel HFET devices, complementary BICFET devices, stacked complementary HFET devices and circuits and/or logic gates based thereon, and a variety of optoelectronic devices and optical devices can also be formed as part of the integrated circuitry.

A split electrode vertical cavity optical device includes an n-type ohmic contact layer, first through fifth ion implant regions, cathode and anode electrodes, first and second injector terminals, and p and n type modulation doped quantum well structures. The cathode electrode and the first and second ion implant regions are formed on the n-type ohmic contact layer. The third ion implant region is formed on the first ion implant region and contacts the p-type modulation doped QW structure. The fourth ion implant region encompasses the n-type modulation doped QW structure. The first and second injector terminals are formed on the third and fourth ion implant regions, respectively. The fifth ion implant region is formed above the n-type modulation doped QW structure and the anode electrode is formed above the fifth ion implant region.

A VCSEL device includes a first electrical contact, a substrate, a second electrical contact, and an optical resonator arranged on a first side of the substrate. The optical resonator includes a first reflecting structure comprising a first distributed Bragg reflector, a second reflecting structure comprising a second distributed Bragg reflector, an active layer arranged between the first and second reflecting structures, and a guiding structure. The guiding structure is configured to define a first relative intensity maximum of an intensity distribution within the active layer at a first lateral position such that a first light emitting area is provided, to define at least a second relative intensity maximum of the intensity distribution within the active layer at a second lateral position such that a second light emitting area is provided, and to reduce an intensity in between the at least two light-emitting areas during operation.

Example photoconductive devices and example methods for using photoconductive devices are described. An example method may include providing a photoconductive device having a metal-semiconductor-metal structure. The method may also include controlling, based on a first input state, illumination of the photoconductive device by a first optical beam during a time period, and controlling, based on a second input state, illumination of the photoconductive device by a second optical beam during the time period. Further, the method may include detecting an amount of current produced by the photoconductive device during the time period, and based on the detected amount of current, providing an output indicative of the first input state and the second input state. The example devices can be used individually as discrete components or in integrated circuits for memory or logic applications.

A vertical cavity surface emitting laser (VCSEL) has first and second electrical contacts, and an optical resonator. The optical resonator has first and second distributed Bragg reflectors (DBRs), an active layer, a distributed heterojunction bipolar phototransistor (DHBP), and an optical guide. The DHBP has a collector layer, light sensitive layer; a base layer; and an emitter layer. There is an optical coupling between the active layer and the DHBP for providing an active carrier confinement by the DHBP. The optical guide guides an optical mode within the optical resonator during operation. The optical guide is outside a current flow which can be provided by the first and second electrical contacts during operation of the VCSEL. The optical guide is outside a layer sequence between the first and second electrical contacts in the vertical direction of the VCSEL. The optical guide has an oxide aperture arranged in the second DBR.

Systems and methods disclosed herein include an illumination module for 3D sensing applications. The illumination module may include an array of vertical cavity surface emitting lasers (VCSELs) emitting light, a driver configured to provide current to the array of VCSELs, and an optical element configured to receive the light emitted by the array of VCSELs and output a light pattern from the illumination module.

Methods of manufacturing a heterojunction bipolar transistor are described herein. An exemplary method can include providing a base/emitter stack, the base/emitter stack comprising a substrate, an etch stop layer over the substrate, an emitter contact layer over the etch stop layer, an emitter over the emitter contact layer, and/or a base over the emitter. The exemplary method further can include forming a collector. The exemplary method also can include wafer bonding the base to the collector. Other embodiments are also disclosed herein.