A vertical cavity surface emitting laser (VCSEL) array may comprise a first subset of VCSELs of a plurality of VCSELs, and a second subset of VCSELs of the plurality of VCSELs. One or more first beams to be emitted by the first subset of VCSELs, when the VCSEL array is powered, and one or more second beams to be emitted by the second subset of VCSELs, when the VCSEL array is powered, may have different patterns of areas of energy intensity. The different patterns of areas of energy intensity may include respective areas of high energy intensity and respective areas of low energy intensity.

A two-dimensional photonic crystal laser with transparent conductive cladding layer is provided. The two-dimensional photonic crystal region through the etching process is composed by multiple periodic air-holes with proper duty cycle. Then, the transparent conductive oxide layer is directly deposited on the top of the entire two-dimensional photonic crystal structure to cover the entire two-dimensional photonic crystal structure in order to form a current spreading layer. The configuration and the process condition of transparent conductive oxide layer are optimized to provide uniform current spreading path and the transparency. In addition to simplifying the whole fabrication process, the optical confinement is improved and the maximum gain to optical feedback is obtained. Overall, low threshold, small divergence angle and high quality laser output is achieved to satisfy the requirements for next-generation light sources.

A layered structure includes a thyristor and a light-emitting element. The thyristor at least includes four layers. The four layers are an anode layer, a first gate layer, a second gate layer, and a cathode layer arranged in this order. The light-emitting element is disposed such that the light-emitting element and the thyristor are connected in series. The thyristor includes a semiconductor layer having a bandgap energy smaller than bandgap energies of the four layers.

A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non-planarized bottom mirror region below the active region.

A high-speed, single-mode, high power, reliable and manufacturable wavelength-tunable light source operative to emit wavelength tunable radiation over a wavelength range contained in a wavelength span between about 950 nm and about 1150 nm, including a vertical cavity laser (VCL), the VCL having a gain region with at least one compressively strained quantum well containing Indium, Gallium, and Arsenic.

A semiconductor vertical resonant cavity light source includes an upper and lower mirror that define a vertical resonant cavity. An active region is within the cavity for light generation between the upper and lower mirror. At least one cavity spacer region is between the active region and the upper mirror or lower mirror. The cavity includes an inner mode confinement region and an outer current blocking region. An index guide in the inner mode confinement region is between the cavity spacer region and the upper or lower mirror. The index guide and outer current blocking region each include a lower and upper epitaxial material layer thereon with an epitaxial interface region in between. At least a top surface of the lower material layer includes aluminum in the interface region throughout a full area of an active part of the vertical light source.

A light-emitting component includes a light-emitting element, a thyristor, and a light-absorbing layer. The thyristor includes a semiconductor layer having a bandgap energy smaller than or equal to a bandgap energy equivalent to a wavelength of light emitted by the light-emitting element. The thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-absorbing layer is disposed between the light-emitting element and the thyristor such that the light-emitting element and the thyristor are stacked. The light-absorbing layer absorbs the light emitted by the light-emitting element.

A surface emitting laser apparatus and a method for manufacturing the same are provided. The surface emitting laser apparatus includes a first reflector layer, an active light-emitting layer, a second reflector layer, and a current confinement structure. The active light-emitting layer is disposed between the first reflector layer and the second reflector layer, so as to produce a laser beam. The current confinement structure has one P-N junction or one PIN junction.

A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.

A semiconductor vertical resonant cavity light source includes an upper and lower mirror that define a vertical resonant cavity. An active region is within the cavity for light generation between the upper and lower mirror. At least one cavity spacer region is between the active region and the upper mirror or lower mirror. The cavity includes an inner mode confinement region and an outer current blocking region. An index guide in the inner mode confinement region is between the cavity spacer region and the upper or lower mirror. The index guide and outer current blocking region each include a lower and upper epitaxial material layer thereon with an epitaxial interface region in between. At least a top surface of the lower material layer includes aluminum in the interface region throughout a full area of an active part of the vertical light source.