H01S5/3054

Adaptive thermal management system for aircraft fuel system

An adaptive thermal management system for a gas turbine engine includes a heat exchanger transferring heat into a coolant, a temperature sensor measuring a temperature of the coolant, and a sensor assembly that measures a parameter of the coolant during operation of the gas turbine engine. The parameter measured by the sensor assembly is indicative of a capacity of the coolant to accept heat from the hot flow. A control valve governs a flow of coolant into the heat exchanger. A controller adjusts the control valve to communicate coolant to the heat exchanger based on a determined capacity of the coolant to accept heat in view of the measured temperature of the coolant and that the measured parameter of the coolant is within a predefined range.

LOW CAPACITANCE OPTOELECTRONIC DEVICE

An optoelectronic semiconductor device is disclosed wherein the device is a vertical-cavity surface-emitting laser or a photodiode containing a section, the top part of which is electrically isolated from the rest of the device. The electric isolation can be realized by etching a set of holes and selective oxidation of AlGaAs layer or layers such that the oxide forms a continuous layer or layers everywhere beneath the top surface of this section. Alternatively, a device can be grown epitaxially on a semi-insulating substrate, and a round trench around a section of the device can be etched down to the semi-insulating substrate thus isolating this section electrically from the rest of the device. Then if top contact pads are deposited on top of the electrically isolated section, the pads have a low capacitance, and a pad capacitance below two hundred femto-Farads, and the total capacitance of the device below three hundred femto-Farads can be reached.

INTEGRATED OPTICAL CIRCULATOR APPARATUS, METHOD, AND APPLICATIONS

An optical circulator is a device that routes optical pulses from port to port in a predetermined manner, e.g. in a 3-port optical circulator, optical pulses entering port 1 are routed out of port 2, while optical pulses entering port 2 exit out of port 3 and optical pulses fed into port 3 exit out of port 3. Currently such an optical circulator is made of discrete components such as magnetooptic garnets, rare-earth magnets and optical polarizers that are packaged together with fiber optic elements. Disclosed herein is a different kind of optical circulator that is monolithically integrated on a single semiconductor substrate and that is applicable for the routing of optical pulses. The embodied invention will enable photonic integrated circuits to incorporate on-chip optical circulator functionality thereby allowing much more complex optical designs to be implemented monolithically.

WAVELENGTH-VARIABLE LASER

An optical semiconductor device outputting a predetermined wavelength of laser light includes a quantum well active layer positioned between a p-type cladding layer and an n-type cladding layer in thickness direction. The optical semiconductor device includes a separate confinement heterostructure layer positioned between the quantum well active layer and the n-type cladding layer. The optical semiconductor device further includes an electric-field-distribution-control layer positioned between the separate confinement heterostructure layer and the n-type cladding layer and configured by at least two semiconductor layers having band gap energy greater than band gap energy of a barrier layer constituting the quantum well active layer. The optical semiconductor device is applied to a ridge-stripe type laser.

Confining features for mode shaping of lasers and coupling with silicon photonic components

A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.

Semiconductor light-emitting device
09837793 · 2017-12-05 · ·

A semiconductor light-emitting device including a light-emitting layer, a first N-type waveguide layer and a plurality of semiconductor layers is provided. The light light-emitting layer has a first side and a second side opposite to the first side. The first N-type waveguide layer is disposed at the first side, and the semiconductor layers are disposed at the second side. The semiconductor layers include at least one P-type semiconductor layer and a plurality of N-type semiconductor layers, and a quantity of the N-type semiconductor layers is more than a quantity of the at least one P-type semiconductor layer.

SURFACE EMITTING LASER, SURFACE EMITTING LASER ARRAY, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING SURFACE EMITTING LASER

Provided is a surface emitting laser capable of reducing resistance while suppressing a decrease in manufacturing efficiency.

The present technology provides a surface emitting laser including: a first multilayer film reflector; a second multilayer film reflector; and an active layer disposed between the first multilayer film reflector and the second multilayer film reflector, in which in the first multilayer film reflector and/or the second multilayer film reflector, a high-concentration impurity region having a higher impurity concentration than other regions is partially provided in a thickness direction. According to the present technology, there is provided a surface emitting laser capable of reducing resistance while suppressing a decrease in manufacturing efficiency.

SEMICONDUCTOR LAYER STACK AND METHOD FOR PRODUCING SAME

A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap,

[00001] E F - E V < E G 2

applying to the layer (A) and

[00002] E L - E F < E G 2

applying to the layer (B), with E.sub.F the energy position of the Fermi level, E.sub.V the energy position of the valence band, E.sub.L the energy position of a conduction band and E.sub.L−E.sub.V the energy difference of the semiconductor band gap E.sub.G, the thickness of the layers (A, B) being selected in such a way that a continuous space charge zone region over the layers (A, B) results.

OPTOELECTRONIC DEVICE WITH ENHANCED LATERAL LEAKAGE OF HIGH ORDER TRANSVERSE OPTICAL MODES INTO ALLOY-INTERMIXED REGIONS AND METHOD OF MAKING SAME

Optoelectronic device undergoes selective chemical transformation like alloy compositional intermixing forming a non-transformed core region and an adjacent to it periphery where transformation has occurred. Activated by selective implantation or diffusion of impurities like Zinc or Silicon, implantation or diffusion of point defects, or laser annealing, transformation results in a change of the refractive index such that the vertical profile of the refractive index at the periphery is distinct from that in the core. Therefore the optical modes of the core are no longer orthogonal to the modes of the periphery, are optically coupled to them and exhibit lateral leakage losses to the periphery. High order transverse optical modes associated to the same vertical optical mode have higher lateral leakage losses to the periphery than the fundamental transverse optical mode, thus supporting single transverse mode operation of the device. This approach applies to single transverse mode vertical cavity surface emitting lasers, edge-emitting lasers and coherently coupled arrays of such devices.

GaN-based VCSEL chip based on porous DBR and manufacturing method of the same

A GaN-based VCSEL chip based on porous DBR and a manufacturing method of the same, wherein the chip includes: a substrate; a buffer layer formed on the substrate; a bottom porous DBR layer formed on the buffer layer; an n-type doped GaN layer formed on the bottom porous DBR layer, which is etched downward on its periphery to form a mesa; an active layer formed on the n-type doped GaN layer; an electron blocking layer formed on the active layer; a p-type doped GaN layer formed on the electron blocking layer; a current limiting layer formed on the p-type doped GaN layer with a current window formed at a center thereof, wherein the current limiting layer covers sidewalls of the active layer, the electron blocking layer and the convex portion of the n-type doped GaN layer; a transparent electrode formed on the p-type doped GaN layer; an n-electrode formed on the mesa of the n-type doped GaN layer; a p-electrode formed on the transparent electrode with a recess formed therein; and a dielectric DBR layer formed on the transparent electrode in the recess of the p-electrode.