H01S5/3201

STRAIN-BALANCED SEMICONDUCTOR STRUCTURE

Systems and methods are described herein to grow a layered structure. The layered structure is implemented as a VCSEL and comprises a first germanium substrate layer having a first lattice constant, a second layer that has a second lattice constant and is epitaxially grown over the first germanium substrate layer, wherein the second layer comprises a compound of a first constituent and a second constituent, and a third layer that has a third lattice constant and is epitaxially grown over the second layer, wherein the third layer comprises a compound of a third constituent and a fourth constituent, wherein the first, second, third and fourth constituents are selected such that the layered structure is pseudomorphic and the first lattice constant is between the second lattice constant and the third lattice constant.

Semiconductor Laser And Atomic Oscillator
20210265820 · 2021-08-26 ·

A semiconductor laser includes a first mirror layer, a second mirror layer, an active layer, a first area provided continuously with the first mirror layer and including a plurality of first oxidized layers, and a second area provided continuously with the second mirror layer and including a plurality of second oxidized layers. The first mirror layer, the second mirror layer, the active layer, the first area, and the second area form a laminate. The laminate includes in the plan view a first section, a second section, and a third section disposed between the first section and the second section along a first axis and causing light produced in the active layer to resonate. The amount of strain per unit volume in the second mirror layer of the third section is measured along a second axis perpendicular to the first axis and passing through the center of the third section in the plan view, and the difference between the maximum of the amount of strain and the minimum thereof is smaller than 0.20%.

LIGHT EMITTING DEVICE

A light emitting device according to an embodiment of the present disclosure includes: a first layer including Al.sub.x2In.sub.x1Ga.sub.(1-x1-x2) N (0<x1<1, 0≤x2<1); a second layer that is provided on the first layer and includes Al.sub.y2In.sub.y1Ga.sub.(1-y1-y2) N (0<y1<1, 0≤y2<1) that is lattice relaxed with respect to the first layer; and a third layer that is provided on the second layer, includes Al.sub.z2In.sub.z1Ga.sub.(1-z1-z2) N (0<z1<1, 0≤z2<1) that is lattice relaxed with respect to the second layer, and includes an active layer. A lattice constant aGAN of GaN in an in-plane direction, a lattice constant al of the first layer in an in-plane direction, a lattice constant a2 of the second layer in an in-plane direction, and a lattice constant a3 of the third layer in an in-plane direction have a relationship of aGAN<a2<a1, a3.

SEMICONDUCTOR DEVICES FOR LASING APPLICATIONS AND METHODS OF MANUFACTURING SUCH DEVICES
20210104871 · 2021-04-08 ·

A structure having first and second layers is disposed on a substrate. The second layer is disposed on the first layer, is compressively strained, and comprises the alloy including germanium and tin. The structure comprises first and second members spaced a distance from each other along a direction, a strip located between the first and second members and extending along an axis intersecting the direction, and arms connecting the first and second members to a first end of the strip. The first and second members, the strip and the arms comprise respective portions of the first and second layers. A portion of the first layer at the strip and arms is removed such that the strip and arms become suspended and the arms remain anchored to the first layer via the first and second members. Tensile strain is induced in the alloy via the arms. The alloy may perform lasing.

SEMICONDUCTOR DEVICES AND METHODS FOR PRODUCING THE SAME
20210119414 · 2021-04-22 ·

Semiconductor devices, such as vertical-cavity surface-emitting lasers, and methods for manufacturing the same, are disclosed. The semiconductor devices include contact extensions and electrically conductive adhesive material, such as fusible metal alloys or electrically conductive composites. In some instances, the semiconductor devices further include structured contacts. These components enable the production of semiconductor devices having minimal distortion. For example, arrays of vertical-cavity surface-emitting lasers can be produced exhibiting little to no bowing. Semiconductor devices having minimal distortion exhibit enhanced performance in some instances.

Laser diodes separated from a plurality of laser bars
10985528 · 2021-04-20 · ·

A laser diode includes a semiconductor body having a substrate and a semiconductor layer sequence arranged on the substrate, which includes an active zone that generates electromagnetic radiation, wherein the semiconductor body has a first main surface and a second main surface opposite the first main surface and at least one first and second laser facet, which are respectively arranged transversely to the first and second main surfaces, and at least one structured facet region located at a transition between the first main surface and at least one of the first and second laser facets, and the structured facet region includes at least a strained compensation layer or a recess.

Edge-emitting semiconductor laser and method for operating a semiconductor laser
10931084 · 2021-02-23 · ·

An edge-emitting semiconductor laser and a method for operating a semiconductor laser are disclosed. The edge-emitting semiconductor laser includes an active zone within a semiconductor layer sequence and a stress layer. The active zone is configured for being energized only in a longitudinal strip perpendicular to a growth direction of the semiconductor layer sequence. The semiconductor layer sequence has a constant thickness throughout in the region of the longitudinal strip so that the semiconductor laser is gain-guided. The stress layer may locally stress the semiconductor layer sequence in a direction perpendicular to the longitudinal strip and in a direction perpendicular to the growth direction. A refractive index of the semiconductor layer sequence, in regions which, seen in plan view, are located next to the longitudinal strip, for the laser radiation generated during operation is reduced by at least 210.sup.4 and by at most 510.sup.3.

Ultra-small vertical cavity surface emitting laser (VCSEL) and arrays incorporating the same

A laser diode includes a semiconductor structure having an n-type layer, an active region, and a p-type layer. One of the n-type and p-type layers includes a lasing aperture thereon having an optical axis oriented perpendicular to a surface of the active region between the n-type and p-type layers. First and second contacts are electrically connected to the n-type and p-type layers, respectively. The first and/or second contacts are smaller than the lasing aperture in at least one dimension. Related arrays and methods of fabrication are also discussed.

Tunable VCSEL polarization control through dissimilar die bonding

A design and method for introducing asymmetric crystal strain to control polarization in a tunable VCSEL, either optically or electrically pumped. The invention is especially relevant to wafer- or die-bonded tunable VCSELs. Then, mechanical stress is applied to the half VCSEL device by asymmetric arrangement of metal bond pads.

Low Resistance Vertical Cavity Light Source with PNPN Blocking
20210218227 · 2021-07-15 ·

A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.