A load control device for controlling the amount of power delivered from an AC power source to an electrical load is operable to conduct enough current through a thyristor of a connected dimmer switch to exceed rated latching and holding currents of the thyristor. The load control device comprises a controllable-load circuit operable to conduct a controllable-load current through the thyristor of the dimmer switch. The load control device disables the controllable-load circuit when the phase-control voltage received from the dimmer switch is a reverse phase-control waveform. When the phase-control voltage received from the dimmer switch is a forward phase-control waveform, the load control device is operable to decrease the magnitude of the controllable-load current so as to conduct only enough current as is required in order to exceed rated latching and holding currents of the thyristor.

An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) converter coupled to the timebase generator. The timebase generator comprises a linear feedback shift register (LFSR) having an output and a logic circuit comprising a first logic inverter, a first AND logic gate, and a first multiplexer, wherein the first logic inverter has an input coupled to a most significant bit of the output of the LFSR, wherein the first AND logic gate has a first input coupled to a second most significant bit of the output of the LFSR and a second input coupled to an output of the first logic inverter, wherein a selector input of the first multiplexer is coupled to an output of the first AND logic gate.

A circuit for controlling an input current, the circuit includes a first input port configured to receive the input current. A current detector detects an input current value of the input current and generates a control signal indicative of the input current value. A first output port outputs an output current to a load. A second output port receives the output current from the load. A control circuit provides a low-impedance path in parallel with the load in response to the control signal indicating the input current value is below a threshold value.

An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) converter coupled to the timebase generator. The timebase generator comprises a linear feedback shift register (LFSR) having an output and a logic circuit comprising a first logic inverter, a first AND logic gate, and a first multiplexer, wherein the first logic inverter has an input coupled to a most significant bit of the output of the LFSR, wherein the first AND logic gate has a first input coupled to a second most significant bit of the output of the LFSR and a second input coupled to an output of the first logic inverter, wherein a selector input of the first multiplexer is coupled to an output of the first AND logic gate.

A controller for a multi-level converter compares a first voltage proportional to an input voltage or an output voltage with a second voltage proportional to a voltage of a flying capacitor and adjusting a slope of a ramp signal for generating a pulse width modulation (PWM) signal so that the second voltage follows the first voltage in controlling the multi-level converter.

Disclosed herein is a switching power supply circuit that includes a switching circuit having an input node connected to an input power supply terminal and an output node connected to an output power supply terminal through an output switch, a feedback circuit configured to feed back information based on a voltage appearing at the output node to the switching circuit, and an activation circuit configured to turn ON the output switch after an elapse of a predetermined time after a voltage appearing at the output node exceeds a predetermined value. The switching circuit is configured to adjust a level of a voltage appearing at the output node based on the information to a predetermined level. The feedback circuit includes an adjustment mechanism configured to adjust a relation between a voltage appearing at the output node and the information.

A method for operating at least one switching device of a power converter includes actuating a first switching element of the switching device by a first pulse-width modulation signal when the current flux in the switching device lies below a predefined threshold value, or actuating a second switching element of the switching device by a second pulse-width modulation signal when a current flux in the switching device exceeds the predefined threshold value. At least one parameter of the first pulse-width modulation signal and/or of the second pulse-width modulation signal is adjusted according to the time point of achievement of the predefined threshold value.

A method for estimating a fundamental component of an AC voltage includes receiving a timely varying measurement signal of the AC voltage; parametrizing a fundamental component of the AC voltage; and determining parameters of the fundamental component based on minimizing a cost function. The fundamental component has a rated frequency, a variable amplitude and a variable phase shift. The cost function is based on an integral of a norm of a difference between the measurement signal and the parametrized fundamental component via a time horizon. The time horizon starts at an actual time point and goes back via a predefined length. The cost function includes a term based on a norm of the difference between a value of the fundamental component at the actual time point and a value of a previously estimated fundamental component at the actual time point, where the previously estimated fundamental component has been determined for a previous time point.

A triac driving circuit according to an embodiment of the present disclosure includes a phototriac coupler, a first resistive element, and a second resistive element, which are connected in series to a gate terminal of a triac. A minimum resistance of the first resistive element including tolerance is higher than a maximum resistance of the second resistive element including tolerance.

A triac driving circuit according to an embodiment of the present disclosure includes a phototriac coupler, a first resistive element, and a second resistive element, which are connected in series to the gate terminal of the triac. A minimum resistance of the first resistive element including tolerance is higher than the maximum resistance of the second resistive element including tolerance.