An electronic circuit is disclosed. The electronic circuit includes a distributed power switch. In some embodiments, the electronic circuit also includes one or more of a distributed gate driver, a distributed gate pulldown device, a distributed diode, and a low resistance gate and/or source connection structure. An electronic component comprising the circuit, and methods of manufacturing the circuit are also disclosed.

An electronic circuit is disclosed. The electronic circuit includes a distributed power switch. In some embodiments, the electronic circuit also includes one or more of a distributed gate driver, a distributed gate pulldown device, a distributed diode, and a low resistance gate and/or source connection structure. An electronic component comprising the circuit, and methods of manufacturing the circuit are also disclosed.

A controller for use in a power converter includes a control loop clock generator that is coupled to generate a switching frequency signal in response to a sense signal representative of a characteristic of the power converter, a load signal responsive to an output load of the power converter, and a hard switch sense output. A hard switch sense circuit is coupled to generate the hard switch sense output in response to the switching frequency signal and a rectifier conduction signal that is representative of a polarity of an energy transfer element of the power converter. A request transmitter circuit is coupled to generate a request signal in response to the switching frequency signal to control switching of a switching circuit coupled to an input of the energy transfer element of the power converter.

A controller for use in a power converter includes a control loop clock generator that is coupled to generate a switching frequency signal in response to a sense signal representative of a characteristic of the power converter, a load signal responsive to an output load of the power converter, and a hard switch sense output. A hard switch sense circuit is coupled to generate the hard switch sense output in response to the switching frequency signal and a rectifier conduction signal that is representative of a polarity of an energy transfer element of the power converter. A request transmitter circuit is coupled to generate a request signal in response to the switching frequency signal to control switching of a switching circuit coupled to an input of the energy transfer element of the power converter.

The present disclosure relates to the field of display technology, and provides a display device, a display panel power supply system and a display panel power supply circuit thereof, the display panel power supply circuit includes: a power supply chip connected with an external power supply; and a gamma chip connected with the power supply chip and the data driving chip.

The present disclosure relates to the field of display technology, and provides a display device, a display panel power supply system and a display panel power supply circuit thereof, the display panel power supply circuit includes: a power supply chip connected with an external power supply; and a gamma chip connected with the power supply chip and the data driving chip.

Voltage generators with relatively low clock feedthrough are disclosed. A voltage generator can include a charge pump with a first set of two switches arranged between two voltages, a second set of two switches arranged between one of the two voltages and an output node, and a fly capacitor connected to the first and second sets of two switches. The voltage generator can include a clock generation circuit to provide clock signals such that the two switches of the first set transition state and the two switches of the second set transition state at different times. In certain embodiments, the charge pump includes a p-type fly capacitor connected to an output node by way of an n-type transistor. In some embodiments, a level shifter can generate a level shifted clock signal for the charge pump and includes cross coupled transistors to receive a regulated voltage provided to the voltage generator.

Voltage generators with relatively low clock feedthrough are disclosed. A voltage generator can include a charge pump with a first set of two switches arranged between two voltages, a second set of two switches arranged between one of the two voltages and an output node, and a fly capacitor connected to the first and second sets of two switches. The voltage generator can include a clock generation circuit to provide clock signals such that the two switches of the first set transition state and the two switches of the second set transition state at different times. In certain embodiments, the charge pump includes a p-type fly capacitor connected to an output node by way of an n-type transistor. In some embodiments, a level shifter can generate a level shifted clock signal for the charge pump and includes cross coupled transistors to receive a regulated voltage provided to the voltage generator.

A multi-output gate driver system comprises a power device having a gate node; a first driver having an input and an output coupled to the gate node; a second driver having an input and an output coupled to the gate node; a first comparator having a first input coupled to the output of the second driver, a second input coupled to a first reference voltage, and an output; a second comparator having a first input coupled to the output of the second driver, a second input coupled to a second reference voltage, and an output; and a logic circuit having an input for receiving a control signal, a first output coupled to the input of the first driver, and a second output coupled to the input of the second driver.

A multi-output gate driver system comprises a power device having a gate node; a first driver having an input and an output coupled to the gate node; a second driver having an input and an output coupled to the gate node; a first comparator having a first input coupled to the output of the second driver, a second input coupled to a first reference voltage, and an output; a second comparator having a first input coupled to the output of the second driver, a second input coupled to a second reference voltage, and an output; and a logic circuit having an input for receiving a control signal, a first output coupled to the input of the first driver, and a second output coupled to the input of the second driver.