Various embodiments relate to a mode detector configured to determine a mode of a circuit based upon an attached power source, including: a first latch configured to hold an first input value and output the first held value and an inverse of the first held value; a second latch configured to hold a second input value and output the second held value and an inverse of the second held value; a first output switch connected between a first power source line and a power source output of the mode detector, wherein the first output switch is configured to be controlled by the output of the first latch; a second output switch connected between a second power source line and the power source output of the mode detector, wherein the second output switch is configured to be controlled by the output of the second latch; a first AND gate with a first input and a second input connected to the inverse output of the second latch, wherein the first input is configured to receive a first power on reset signal based upon the first power source line; and a second AND gate with a first input and a second input connected to the inverse output of the first latch, wherein the first input is configured to receive a second power on reset signal based upon the second power source line, wherein the mode of the circuit is indicated by the outputs of the first latch and the second latch.

A drive circuit includes a rectification circuit, a buck converter, and an inverter. the rectification circuit is configured to rectify a first AC voltage signal to generate a rectified voltage signal. The buck converter is configured to downconvert the rectified voltage signal to a DC voltage signal, wherein the DC voltage signal is supplied to a DC bus. The inverter is configured to convert the DC voltage signal to a second AC voltage signal and supply the second AC voltage signal to a compressor motor and to a condenser fan motor. The peak voltages of the second AC voltage signal are less than peak voltages of the first AC voltage signal.

A converter for conversion between three-phase AC and a DC signal may include three phase terminals, a first and second DC terminal, conversion circuitry for conversion between three phase voltages of the three-phase AC signal and a first and second intermediate voltage at first and second intermediate nodes, and first and second buck circuits. The buck circuits each have three devices that are actively switchable for connecting switch-node terminals to any one of the three phase terminals. The first buck circuit includes a second switching device connected between the first intermediate node and the first switch-node terminal, and a first filter inductor connected between the first switch-node terminal and the first DC terminal. The second buck circuit has another second switching device connected between the second intermediate node and the second switch-node terminal, and a second filter inductor connected between the second switch-node terminal and the second DC terminal.

A drive circuit is provided and includes a rectification circuit, a buck converter, a first inverter, and a second inverter. The rectification circuit is configured to rectify a first AC voltage signal to generate a rectified voltage signal. The buck converter is configured to downconvert the rectified voltage signal to a DC voltage signal, wherein the DC voltage signal is supplied to a DC bus. The first inverter is configured to convert the DC voltage signal to a second AC voltage signal and supply the second AC voltage signal to a compressor motor. The second inverter is configured to convert the DC voltage signal to a third AC voltage signal and supply the third AC voltage signal to a condenser fan motor. Peak voltages of the second AC voltage signal and the third AC voltage signal are less than peak voltages of the first AC voltage signal.

A high power factor control circuit is disclosed, which is used in an AC/DC converter. The converter includes a rectification module, a conversion module and a load. The rectification module receives AC power and rectifies it into a DC current, and the conversion module converts the DC current to drive power as desired by the load and provides it to the load. The conversion module includes a conversion element including an inductive element and a switching element. The control circuit includes a peak limiting signal generator and a switching element control module. The peak limiting signal generator receives a reference signal and produces at least one peak limiting signal from a sample signal. The switching element control module is configured to control switching of the switching element so that, within at least half a line-frequency period, a value of the ripple in the output current flowing through the load is not greater than a limit value.

As an example, a power supply may provide a particular voltage of multiple voltages based on a power profile provided by a universal serial bus Type C (USB-C) integrated circuit (IC) built-in to a USB-C port of a computing device. A power factor correction (PFC) converter may provide an output voltage that varies according to the power profile. The output voltage of the PFC converter may be used as an input to an inductor-inductor-capacitor (LLC) converter. The LLC converter may produce an output voltage that varies in voltage level proportionally to the PFC converter output voltage. The PFC converter may provide a voltage to the LLC converter that causes the LLC converter to provide an amount of voltage indicated in the power profile sent by the USB-C IC of the computing device.

Systems and methods for efficient power conversion in a power supply in a power distribution system are disclosed. In particular, a low frequency transformer having high conversion efficiency is coupled to an input from a power grid. An output from the transformer is rectified and then converted by a power factor correction (PFC) converter before passing the power to the distributed elements of the power distribution system. By placing the transformer in front of the PFC converter, overall efficiency may be improved by operating at lower frequencies while preserving a desired power factor and providing a desired voltage level. The size and cost of the cabinet containing the power conversion circuitry is minimized, and operating expenses are also reduced as less waste energy is generated.

This disclosure includes novel ways of implementing a power supply that powers a load. More specifically, a power supply includes a controller. The controller controls operation of a first power converter stage and a second power converter stage to convert an input voltage into an output voltage. For example, the first power converter stage is operative to receive an input voltage and convert the input voltage into an intermediate voltage. The second power converter stage such as a transformer-less switched-capacitor converter is coupled to the first power converter stage. The second power converter stage receives the intermediate voltage and converts the intermediate voltage into an output voltage to power a load.

An apparatus for controlling a power converter that includes an inductance and a switched-capacitor network that cooperate to transform a first voltage into a second voltage features a controller, a switched-capacitor terminal for connection to the switched-capacitor network, and switches. at least one of which connects to the switched-capacitor terminal.

A multi-phase switched-mode power supply includes first and second interleaved phase circuits coupled between input and output terminals. The first phase circuit includes a first inductor coupled with a first switch, and the second phase circuit includes a second inductor coupled with a second switch. A control circuit is configured to output first and second PWM signals to the first and second switches. An on time of the second PWM signal is equal to an on time of the first PWM signal plus a fixed offset time period. The control circuit is configured to determine a period between rising edges of the first PWM signal in order to determine an off trigger PWM signal, and change the second PWM signal to a logical low value when a falling edge of the off trigger PWM signal occurs while the second PWM signal has a logical high value.