In described examples, a power management circuit includes a voltage sensor and a differential power converter. The voltage sensor is coupled in series with other voltage sensors between a high voltage bus and a ground bus. The voltage sensor senses a voltage across an impedance and outputs a control signal in response to the sensed voltage. The differential power converter is coupled in series with other differential power converters and in parallel with a load between the high voltage bus and the ground bus. The differential power converter is configured to increase or decrease a supplied current in response to a change in magnitude of the control signal.

Provided is a voltage divider circuit having a small area and good accuracy of a division ratio. Among a plurality of resistors of the voltage divider circuit, each of resistors having a large resistance value, that is, resistors (1/4R, 1/2R, 1R, 9R, 10R) having high required accuracy of ratio includes first unit resistors (5A) that have a first resistance value and are connected in series or connected in parallel to each other, and each of resistors having a small resistance value, that is, resistors (1/16R, 1/8R) having low required accuracy of ratio includes second unit resistors (5B) that have a second resistance value smaller than the first resistance value and are connected in parallel to each other.

Provided is a voltage divider circuit having a small area and good accuracy of a division ratio. Among a plurality of resistors of the voltage divider circuit, each of resistors having a large resistance value, that is, resistors (1/4R, 1/2R, 1R, 9R, 10R) having high required accuracy of ratio includes first unit resistors (5A) that have a first resistance value and are connected in series or connected in parallel to each other, and each of resistors having a small resistance value, that is, resistors (1/16R, 1/8R) having low required accuracy of ratio includes second unit resistors (5B) that have a second resistance value smaller than the first resistance value and are connected in parallel to each other.

A power factor correction circuit includes: a coil and MOSFETs that boost an input voltage to generate a boosted voltage; a first capacitor having one end connected to a first output terminal, and the other end connected to an intermediate node; and a second capacitor having one end connected to the intermediate node, and the other end connected to a second output terminal. In a first operation mode, the boosted vol tage is applied to the two ends of the first capacitor when a positive voltage is input, and applied to the two ends of the second capacitor when a negative voltage is input. In a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series. Thus, there is provided a power factor correction circuit which has a high efficiency and is compatible with an input voltage in a broad range.

Disclosed herein is a device, system, and method for a trickle charging system of non-inductive voltage boost (NVB) converter with built-in auto-dummy-load (ADL) for wide-range of charge storage devices i.e. small button-cell type batteries and super-caps using micro power pyro-electricity at Si-MOS sub-threshold voltage. A VLSI configuration of the system is also disclosed in embodiments. The system converts the pyro-electric material at MOS sub-threshold 0.37V for optimizing to the battery charging level at 1.45V. This system was proven at hardware level and found to be 98.8% power efficient. The designed IC can charge independently without any external components for up to 1 uW max, but able to charge up to 20 uA with external components. Thus it is considered to be a very versatile design.

Disclosed herein is a non-Inductive voltage boost-converter (NVBC) for micro-power energy harvesting systems for energy storage and delivery applications. Current devices deliver a wide-range of micro-power having only up to 0.8V peak-voltage, but nominally 0.45V in lab test conditions. This voltage is not adequate in charging storage cells such as rechargeable batteries and also driving electronic circuits. Technology is in demand where a boost-converter must operate at MOS sub-threshold voltage (Sub-V.sub.TH) limits. Disclosed herein is a novel NVBC device that has eliminated the need of an inductor coil and associated high-speed switching circuits; thus achieving higher efficiency. The disclosed invention applies a simple self-synchronizing technique to adapt the NVBC automatically to the low-frequency energy signal of a pyroelectric device. A novel NVBC is presented for stabilized output of NVBC (S-NVBC). In an embodiment, the S-NVBC achieves an efficiency of 86%.

Disclosed herein is a non-Inductive voltage boost-converter (NVBC) for micro-power energy harvesting systems for energy storage and delivery applications. Current devices deliver a wide-range of micro-power having only up to 0.8V peak-voltage, but nominally 0.45V in lab test conditions. This voltage is not adequate in charging storage cells such as rechargeable batteries and also driving electronic circuits. Technology is in demand where a boost-converter must operate at MOS sub-threshold voltage (Sub-V.sub.TH) limits. Disclosed herein is a novel NVBC device that has eliminated the need of an inductor coil and associated high-speed switching circuits; thus achieving higher efficiency. The disclosed invention applies a simple self-synchronizing technique to adapt the NVBC automatically to the low-frequency energy signal of a pyroelectric device. A novel NVBC is presented for stabilized output of NVBC (S-NVBC). In an embodiment, the S-NVBC achieves an efficiency of 86%.

A DC/DC converter includes: duty command calculation units for calculating duty command values for first, second, third, and fourth switching elements on the basis of difference voltage between a high-voltage-side voltage command value and a high-voltage-side voltage detection value; and a phase shift duty command calculation unit for calculating a phase shift duty command value corresponding to a phase difference between gate signals for the first and fourth switching elements and gate signals for the second and third switching elements, on the basis of difference voltage between a voltage target value and a charge voltage detection value of a charge/discharge capacitor, wherein gate signals for driving the first, second, third, fourth switching elements are generated on the basis of the duty command values and the phase shift duty command value.

A DC/DC converter includes: duty command calculation units for calculating duty command values for first, second, third, and fourth switching elements on the basis of difference voltage between a high-voltage-side voltage command value and a high-voltage-side voltage detection value; and a phase shift duty command calculation unit for calculating a phase shift duty command value corresponding to a phase difference between gate signals for the first and fourth switching elements and gate signals for the second and third switching elements, on the basis of difference voltage between a voltage target value and a charge voltage detection value of a charge/discharge capacitor, wherein gate signals for driving the first, second, third, fourth switching elements are generated on the basis of the duty command values and the phase shift duty command value.

A power stabilization circuit including a first reference power supply, a second reference power supply, and a combiner circuit coupled to the first reference power supply and the second reference power supply. The first reference power supply is configured to receive a first control signal, generate a first reference signal based on the first control signal, and provide the first reference signal to a first output power supply. The second reference power supply is configured to receive a second control signal, generate a second reference signal based on the second control signal, and provide the second reference signal to a second output power supply. The combiner circuit is configured to generate a combined reference signal based on the first reference signal and the second reference signal and drive a reference load based on the combined reference signal.