A method for operating a processing system to identify faults in an electric machine system including a multiphase machine having plurality of sets of windings; comprising: receiving parameter information representative of electrical operating parameters of the multiple phases of each of the multiple winding sets of the multiphase machine; determining symmetrical components based on the parameter information; comparing the symmetrical components to fault information defining faults of the multiple phases of the multiple winding sets with respect to symmetrical component fault values; identifying faults in one or more of the multiple phases of the multiple winding sets based on the comparison.

Provided are a motor control device (1) for controlling a motor (2) having a plurality of phases, for quickly and accurately detecting a phase in which an open-state fault has occurred when the open-state fault occurs in a target phase. When a power-supply voltage (Vb) is equal to or higher than a predetermined voltage (Vthr), a motor rotation speed () is equal to or lower than a predetermined speed (thr), a target x-phase voltage command (Vx*) is not in the vicinity of zero, a current (Ix) of the target x-phase is equal to or lower than a predetermined current (Iu_thr), and a state in which a control error is equal to or larger than a predetermined error is detected over a predetermined time period or longer, occurrence of an open-state fault in the target phase is determined.

A method recognizes a wire-break fault during operation of a brushless DC motor. A switch-on delay duration of a transition of an electrical phase potential that rests on the stator winding phase from a switch-off potential to a switch-on potential and a switch-off delay duration of the transition of the phase potential from the switch-on potential to the switch-off potential are detected for a stator winding phase of the stator winding of the motor during each pulse width modulation cycle period. Moreover, a lower deviation limit is defined for a deviation of detected switch-off delay durations from detected switch-on delay durations. A wire-break fault is deduced if the deviations of the detected switch-off delay durations from the detected switch-on delay durations fall below the lower deviation limit.

A short circuit detection circuit and a short circuit detection method for a multi-phase rectifier are provided, which are used for detecting conditions of a spectrum of a FWR signal outputted from the multi-phase rectifier in the frequency domain. Next, determining whether the detected signal indicating the amplitude of the frequency of the AC signal is greater than or equal to the reference signal, so as to determine whether the multi-phase rectifier has a short circuit condition. Therefore, the short circuit detection circuit and the short circuit detection method do not have any requirements for configuring a short circuit detection element on each current path of the multi-phase rectifier, so that the power loss and the cost can be reduced effectively.

A control unit includes a drive control unit that controls the on and off operation of the switching elements, and an abnormality determination unit that performs abnormality determination on energization paths to the motor windings. The abnormality determination unit identifies a faulted phase, based on voltage detection values when the switching elements of all the phases are turned off, and identifies a permanent energization fault of the faulted phase, based on at least one of a current detection value when one of the switching elements corresponding to the identified faulted phase is turned on, and a rotational position detection value when one or more of the switching elements corresponding to one or more of normal phases are turned on.

Various examples in accordance with the present disclosure provide systems, apparatuses, methods, and computer program products associated with detecting phase fault in a motor, such as unbalance phase and phase loss fault.

A power module includes: a first substrate having an outer surface and an inner surface, the first substrate extending from a first longitudinal end toward a second longitudinal end; a semiconductor die coupled to the inner surface of the first substrate; and a second substrate having an outer surface and an inner surface, the semiconductor die being coupled to the inner surface of the second substrate, the second substrate extending from a first longitudinal end toward a second longitudinal end, wherein the first longitudinal end of the first substrate is longitudinally offset from the first longitudinal end of the second substrate.

A system includes an inverter including: a first galvanic isolator separating a low voltage area from a high voltage area, the first galvanic isolator having a first galvanic isolator output path; a second galvanic isolator having a second galvanic isolator output path; an amplifier connected to the first galvanic isolator via the first galvanic isolator output path, and connected to the second galvanic isolator via the second galvanic isolator output path, the amplifier having a first amplifier output path and a second amplifier output path; a comparator connected to the amplifier via the first amplifier output path and the second amplifier output path, the comparator having a first comparator output path and a second comparator output path; and a pulse reshape and envelope detector connected to the comparator via the first comparator output path and the second comparator output path.

A system comprises an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a galvanic isolator separating a high voltage area from a low voltage area; a low voltage phase controller in the low voltage area, the low voltage phase controller configured to receive a clock reference signal; and a high voltage phase controller in the high voltage area, the high voltage phase controller configured to align a clock reference signal of the high voltage phase controller with the clock reference signal of the low voltage phase controller.

A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a galvanic interface configured to separate a high voltage area from a low voltage area, the galvanic interface including a command channel and a message channel; a low voltage controller in the low voltage area, the low voltage controller configured to receive a PWM signal from a PWM controller; and a high voltage controller in the high voltage area, the high voltage controller configured to receive a control signal from the low voltage controller using the command channel of the galvanic interface, and send a switch state signal to the low voltage controller using the command channel of the galvanic interface, wherein the low voltage controller is configured to control the control signal based on the PWM signal and the switch state signal.