A voltage-controlled oscillator (VCO), includes a resonator circuit connected to receive an input voltage and having a first output node and a second output node; and at least one cross-coupled switching circuit portion, each cross-coupled switching circuit portion comprising a first transistor having a drain connected to the first output node and a second transistor having a drain connected to the second output node, the first transistor having a gate connected between the drain of the second transistor and the second output node and the second transistor having a gate connected between the drain of the first transistor and the first output node, each of the first and second transistors having a threshold voltage that is determined to be the highest threshold voltage available for the process used to create the VCO.

A system includes a data path and a phase-locked loop (PLL) coupled to the data path. The system also includes a voltage-controlled oscillator (VCO) coupled to the PLL. The VCO includes an LC circuit with first and second differential output terminals. The VCO also includes a first resistor coupled between the first differential output terminal and drain terminals of a first pair of complementary metal-oxide semiconductor (CMOS) transistors. The VCO also includes a second resistor coupled between the second differential output terminal and drain terminals of a second pair of CMOS transistors.

A temperature-compensated oscillator includes a resonator element, an oscillating circuit, and a temperature compensation circuit, and in a case of varying temperature in a temperature range of ±5° C. centered on a reference temperature in intervals of 6 minutes, and assuming observation period as τ, a wander performance fulfills a condition that an MTIE value is equal to or shorter than 6 ns in a range of 0 s<τ≦0.1 s, the MTIE value is equal to or shorter than 27 ns in a range of 0.1 s<τ≦1 s, the MTIE value is equal to or shorter than 250 ns in a range of 1 s<τ≦10 s, the MTIE value is equal to or shorter than 100 ns in a range of 10 s<τ≦1700 s, and the MTIE value is equal to or shorter than 6332 ns in a range of 100 s<τ≦1000 s.

A voltage-controlled oscillator, including a voltage-controlled LC resonator including at least one first output node; an amplifier including at least one first dual-gate MOS transistor including first and second gates, coupling the first output node to a second node of application of a reference potential; and a regulation circuit capable of applying to the second gate of the first transistor a bias voltage variable according to the amplitude of the oscillations of a signal delivered on the first output node of the oscillator.

A frequency doubler (tripler, or quadrupler) employs current re-use coupled oscillator technique to enhance phase noise without increasing current consumption. Frequency doubler uses coupling between two oscillators running at different frequencies; a first oscillator is running at the target frequency and a second oscillator is running at half the frequency. The coupling between the two oscillators is via a transformer having a primary transformer coil and a secondary transformer coil. The first oscillator comprises a differential inductor, coarse/fine tuning capacitor arrays, and an n-type trans-conductor (GM). A virtual ground node of the n-type GM is coupled to one side of the primary transformer coil and the other side of the primary coil is coupled to the center tap of the secondary coil. The second oscillator comprises the secondary coil, coarse/fine tuning capacitor arrays, n-type GM, frequency tracking loop (FTL) and 2.sup.nd-harmonic LC filter network.

The present disclosure relates to an oscillator device (15) comprising an amplifier unit (16) and a tunable waveguide resonator (1) which in turn comprises a rectangular waveguide part (2) having electrically conducting inner walls (3) and a first waveguide port (4). The amplifier unit (16) is arranged to be electrically connected to the waveguide resonator (1) via the first waveguide port (4) by means of a first connector (17). The waveguide resonator (1) comprises at least one tuning element (6) positioned within the waveguide part (2), wherein each tuning element (6) comprises an electrically conducting body (7) and a holding rod (8a, 8b). The holding rod (8a, 8b) is attached to the electrically conducting body (7) and is movable from the outside of the waveguide resonator (1) such that the electrically conducting body (7) can be moved between a plurality of positions within the waveguide part (2) by means of the holding rod (8a, 8b).

An oscillator circuit includes an oscillator transistor (Q1) having respective first, second, and control terminals, the oscillator transistor being arranged to generate a microwave oscillating signal at the first terminal. A surface integrated waveguide resonator (Y1) is connected to the second terminal of the oscillator transistor (Q1). An active bias circuit portion (202) including a negative feedback arrangement is between the first terminal of the oscillator transistor (Q1) and the control terminal of the oscillator transistor (Q1), the active bias circuit portion being arranged to supply a bias current to the control terminal of the oscillator transistor (Q1). The bias current is dependent on a voltage at the first terminal of the oscillator transistor (Q1) multiplied by a negative gain.

A crystal oscillator reducing phase noise and a semiconductor chip including the same are provided. The crystal oscillator includes a transconductance circuit electrically connected to a crystal, a load capacitor connected to the transconductance circuit, a feedback resistance circuit connected between an input terminal of the transconductance circuit and an output terminal of the transconductance circuit, the feedback resistance circuit configured to provide a feedback resistance, and a variable resistance controller configured to generate a resistance control signal for controlling the feedback resistance, the resistance control signal causing the feedback resistance to have a first value in a first period and a second value in a second period, the first value being less than the second value, the first period corresponding to a first portion of a cycle of the clock signal, and the second period corresponding to a second portion of the cycle different from the first portion.

A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may generate a reset signal including at least one reset pulse for resetting the bias voltage. In addition, the reset signal is generated without calibrating the at least one reset pulse to a zero-crossing point of the sinusoidal wave.

A frequency synthesizer is described that includes: a voltage controlled oscillator, VCO; a VCO bias circuit, operably coupled to the VCO and configured to provide a controllable bias current of the VCO; a temperature sensor, located in the frequency synthesizer, configured to determine an operating temperature of the frequency synthesizer; an analog-to-digital converter, ADC, operably coupled to the temperature sensor and configured to provide a digital representation of the determined operating temperature; and a bias control circuit operably coupled and configured to provide a bias control signal to the VCO bias circuit based on the determined operating temperature of the frequency synthesizer. The VCO bias circuit is configured to adjust the controllable bias current applied to the VCO based on the bias control signal.