Disclosed is a phase shifter, which includes a signal generator that generates a first signal and a second signal having a phase orthogonal to a phase of the first signal, and outputs the first signal and the second signal, an operator that generates a first current and a second current, and amplifies the first current and the second current, and a signal converter converting a first digital signal and a second digital signal. The operator includes an input circuit converting the first signal and the second signal, a path selection circuit determining paths of the generated first current and the generated second current, and a cascode circuit buffering the first current and the second current. The operator sums the first current and the second current, controls a vector of the first current and a vector of the second current, and generates a voltage signal through an output load.

The invention relates to a mixer circuit, which includes a transconductance stage circuit, a switch stage circuit and a load stage circuit which are electrically connected in sequence. The transconductance stage circuit is used to access a radio frequency voltage signal and convert the radio frequency voltage signal into a radio frequency current signal The switch-level circuit is used to access the local oscillator signal and the radio frequency current signal, and the switch-level transistor is turned on by using the local oscillator signal; the load-level circuit is used to convert the intermediate frequency current signal into a voltage signal for output. In the present invention, the transconductance stage circuit adopts a transistor superposition technology structure, which improves the conversion gain of the mixer; at the same time, it uses a source degenerate inductance structure, which further improves the conversion gain and linearity of the circuit.

A receiver includes one or more mixers configured to sample an input analog signal at a plurality of discrete points in time to obtain a discrete-time sampled signal based on a local oscillating signal provided by a local oscillator; and a sample reordering circuit coupled to the one or more mixers and configured to reorder a sequence of samples received from the one or more mixers.

A double-balanced radio-frequency (RF) mixing digital-to-analog converter (DAC) apparatus includes a load network, a first set of resistive DAC driver circuits and a first mixing core. The first mixing core can receive first RF input signals from the first set of resistive DAC driver circuits and can provide a first mixed signal to the load network. The first mixing core includes a first input differential pair coupled to two first cross-coupled differential pairs. The first input differential pair can receive first RF input signals at respective first input nodes. Each of the two first cross-coupled differential pairs can receive first positive and negative local oscillator (LO) signals at corresponding first input nodes. The first mixing core can mix the first RF input signals with the first positive and negative LO signals.

A resistive mixer includes a LO matching circuit inserted between the gate of an FET and a LO terminal, a bias circuit that is connected to the gate and applies a bias voltage to the gate, an RF matching circuit inserted between the drain of the FET and an RF terminal, and an IF matching circuit inserted between the drain and an IF terminal. The source of the FET is grounded. The impedance of the RF matching circuit seen from the drain of the FET at an IF frequency is open-circuit, and the impedance of the IF matching circuit seen from the drain of the FET at an RF frequency is open-circuit.

A distributed mixer is configured of an artificial transmission line of which an input end is connected to an LO terminal and a terminal end is connected to an IF terminal, an artificial transmission line of which an input end is connected to an RF terminal, FETs that perform frequency synthesis of LO signals and RF signals and that are disposed following the artificial transmission lines and of which gates are connected to the artificial transmission line and sources are grounded, a bias circuit that applies gate bias voltage to a terminal end of the artificial transmission line, a terminating resistor that connects the terminal end of the artificial transmission line and a ground, and a plurality of transmission lines provided between the artificial transmission line and a drain of each FET.

Proposed is related to a quadrature passive mixer and a frequency down-converter for enhancing an input referred second-order intercept point (IIP2). More particularly, proposed is related to a quadrature passive mixer and a frequency down-converter for enhancing the IIP2 capable of improving the IIP2 by reducing a mismatch component of a mixer block used for frequency downconversion of a wireless communication system. Here, the frequency down-converter for improving the IIP2 according to the embodiment of the present invention includes an RF quadrature signal generator, an LO IQ signal generator, a 25% LO signal generator, an LO buffer, an I-quadrature mixer, and a Q-quadrature mixer. In addition, the I-quadrature mixer and the Q-quadrature mixer receive RF quadrature signals from the RF quadrature signal generator and selectively downconvert and output the RF quadrature signals according to the 25% duty-cycle LO signals applied from the LO buffer.

The invention relates to a mixer circuit, which includes a transconductance stage circuit, a switch stage circuit and a load stage circuit which are electrically connected in sequence. The transconductance stage circuit is used to access a radio frequency voltage signal and convert the radio frequency voltage signal into a radio frequency current signal The switch-level circuit is used to access the local oscillator signal and the radio frequency current signal, and the switch-level transistor is turned on by using the local oscillator signal; the load-level circuit is used to convert the intermediate frequency current signal into a voltage signal for output. In the present invention, the transconductance stage circuit adopts a transistor superposition technology structure, which improves the conversion gain of the mixer; at the same time, it uses a source degenerate inductance structure, which further improves the conversion gain and linearity of the circuit.

An electronic circuit including: a differential multiplier circuit with a first differential input and a second differential input and a differential output; and a phase locked loop (PLL) circuit including: (1) a balanced differential mixer circuit with a first differential input electrically connected to the differential output of the differential multiplier circuit, a second differential input, and an output; (2) a loop filter having an output and an input electrically connected to the output of the balanced differential mixer circuit; and (3) a voltage controlled oscillator (VCO) circuit having an input electrically connected to the output of the loop filter and with an output electrically feeding back to the second differential input of the balanced differential mixer circuit.

According to one embodiment, a compact broadband radio frequency (RF) receiver circuit includes a low noise amplifier which includes a first amplifier stage, a second amplifier stage, an inter-stage network including a higher order filter network, where the inter-stage network is coupled between the first amplifier stage and the second amplifier stage, and a double resonance transformer network coupled to an output of the second amplifier stage. The RF receiver circuit includes a low pass filter and a mixer circuit coupled between the low noise amplifier and the low pass filter.