A low power transmitter includes a low frequency feedback loop, a high frequency switching element embedded within the low frequency feedback loop, and a mixer electrically communicating with the low frequency feedback loop and the high frequency switching element. The low frequency feedback loop employs either a voltage mode interface or a current mode interface. The high frequency switching element includes a first transistor, a second transistor, and a pair of inductive elements. Alternatively, the high frequency switching element includes a single transistor and a single inductive element.

A mixer circuit including a mixer, a voltage divider circuit, and an amplifier, is provided. The mixer receives a first input signal, a second input signal, and at least one set of bias voltages, and generates an output signal. A frequency of the output signal is related to a frequency of the first input signal and a frequency of the second input signal. The voltage divider circuit receives the bias voltages and generates a common mode signal at an output end. The amplifier is coupled to the mixer to receive the output signal, and is coupled to the output end of the voltage divider circuit and configured to suppress noise in the output signal, and generate a final output signal.

A frequency multiplier includes an input section to receive a quadrature phase input signal having an input frequency, a mixer section coupled to the input section by a common mode node that forms a path for the common mode signal current to flow to the mixer section and magnetically coupled to the common mode node or capacitively coupled to the input section to generate a differential switching voltage at odd multiples of twice the input frequency, which switching voltage is applied to inputs of the mixer section, and an output section magnetically coupled to the mixer section, the output section being configured to generate an output voltage having a dominate frequency and sub-dominate frequencies spaced apart by the first multiple, the dominate frequency of the output voltage being a second multiple of the input frequency, where the second multiple is greater than the first multiple. Various arrangements are provided.

A distributed amplifier includes a first transmission line for input, a second transmission line for output, an input termination resistor connecting a line end of the first transmission line and a power supply voltage, an output termination resistor connecting an input end of the second transmission line and a ground, unit cells having input terminals connected to the first transmission line and output terminals connected to the second transmission line, and a bias tee configured to supply a bias voltage to an input transistor of each of the unit cells. An emitter or source resistor of the input transistor of each of the unit cells is set to a different resistance value from each other in order for a collector or drain current flowing through the input transistor of each of the unit cells to have a uniform value.

Methods and systems for receiving a differential input voltage signal at an input of a variable gain amplifier, and responsively generating an amplified differential output voltage signal on a pair of output nodes by driving a pair of load impedances connected to the pair of output nodes with an amplifier current according to the differential input voltage signal, enabling a cross-coupled differential pair connected in parallel to the pair of load impedances, the cross-coupled differential pair having drain inputs and cross-coupled gate inputs connected to the pair of output nodes to supplement a gain of the amplified differential voltage output voltage signal, and reducing a common mode voltage of the amplified differential output voltage signal by lowering the amplifier current driving the pair of load impedances via a bias control signal, the amplifier current lowered responsive to detecting the supplemented gain of the amplified differential output voltage signal.

A mixer includes a load portion connected between an input terminal of a first power voltage and an output terminal of the radio frequency transmit signal and configured to adjust a magnitude of the radio frequency transmit signal, a first switching unit connected to an output terminal of the radio frequency transmit signal, and configured to perform a first switching operation in response to a plurality of local oscillation signals, and a second switching unit connected between the first switching unit and an input terminal of a second power voltage, lower than the first power voltage, and configured to perform a second switching operation in response to a plurality of baseband signals, the plurality of local oscillation signals include an I+ baseband signal, an I− baseband signal, a Q+ baseband signal, and a Q− baseband signal, and the second switching unit includes a first branch performing a switching operation under control of the I+ baseband signal and the Q+ baseband signal, a second branch performing a switching operation under control of the I− baseband signal and the Q− baseband signal, a third branch performing a switching operation under control of the Q+ baseband signal and the I− baseband signal, and a fourth branch performing a switching operation under control of the Q− baseband signal and the I+ baseband signal.

A distributed amplifier includes a first transmission line for input, a second transmission line for output, an input termination resistor connecting a line end of the first transmission line and a power supply voltage, an output termination resistor connecting an input end of the second transmission line and a ground, unit cells having input terminals connected to the first transmission line and output terminals connected to the second transmission line, and a bias tee configured to supply a bias voltage to an input transistor of each of the unit cells. An emitter or source resistor of the input transistor of each of the unit cells is set to a different resistance value from each other in order for a collector or drain current flowing through the input transistor of each of the unit cells to have a uniform value.

Disclosed is a phase shifter, which includes a signal generator that generates a first signal and a second signal having a phase orthogonal to a phase of the first signal, and outputs the first signal and the second signal, an operator that generates a first current and a second current, and amplifies the first current and the second current, and a signal converter converting a first digital signal and a second digital signal. The operator includes an input circuit converting the first signal and the second signal, a path selection circuit determining paths of the generated first current and the generated second current, and a cascode circuit buffering the first current and the second current. The operator sums the first current and the second current, controls a vector of the first current and a vector of the second current, and generates a voltage signal through an output load.

A mixer includes a load portion connected between an input terminal of a first power voltage and an output terminal of the radio frequency transmit signal and configured to adjust a magnitude of the radio frequency transmit signal, a first switching unit connected to an output terminal of the radio frequency transmit signal, and configured to perform a first switching operation in response to a plurality of local oscillation signals, and a second switching unit connected between the first switching unit and an input terminal of a second power voltage, lower than the first power voltage, and configured to perform a second switching operation in response to a plurality of baseband signals, the plurality of local oscillation signals include an I+ baseband signal, an I− baseband signal, a Q+ baseband signal, and a Q− baseband signal, and the second switching unit includes a first branch performing a switching operation under control of the I+ baseband signal and the Q+ baseband signal, a second branch performing a switching operation under control of the I− baseband signal and the Q− baseband signal, a third branch performing a switching operation under control of the Q+ baseband signal and the I− baseband signal, and a fourth branch performing a switching operation under control of the Q− baseband signal and the I+ baseband signal.

A low-power double-quadrature receiver is disclosed. The double-quadrature receiver includes a quadrature signal generator configured to generate a first quadrature signal and a second quadrature signal based on each component of a differential input signal, and a switching stage configured to perform down-conversion on the first quadrature signal and the second quadrature signal.