Patent classifications
H03F1/0288
OUTPUT STAGE CIRCUIT ASSEMBLY FOR POWER AMPLIFIER SYSTEM WITH IMPROVED POWER MANAGEMENT
Examples of the disclosure include an output stage circuit assembly for a power amplifier system, the output stage circuit assembly comprising a plurality of output stage amplifiers connected in parallel to each other, each output stage amplifier of the plurality of output stage amplifiers configured to amplify an input signal of the output stage circuit assembly when turned on, and a controller configured to determine a number of output stage amplifiers to be turned off based on at least one of a voltage supplying mode for the power amplifier system or a power management mode of a device in which the power amplifier system is embedded, and to control the plurality of output stage amplifiers to be turned on or off according to the determined number of output stage amplifiers to be turned off.
HIGH-FREQUENCY AMPLIFIER
A high-frequency amplifier includes a driver amplifier configured to amplify an input high-frequency signal, a Doherty amplifier, including a carrier amplifier and a peak amplifier, and configured to further amplify a signal output from the driver amplifier, a first multilayer substrate, a second multilayer substrate laminated to overlap the first multilayer substrate, and a base member mounted with the first multilayer substrate and the second multilayer substrate, wherein the driver amplifier is mounted on the second multilayer substrate, the carrier amplifier and the peak amplifier are mounted on the first multilayer substrate, the driver amplifier, the carrier amplifier, and the peak amplifier have a front surface forming a predetermined circuit, and a back surface located on an opposite side from the front surface, respectively, the front surface of the driver amplifier opposes the first multilayer substrate, and the back surface of the driver amplifier is separated from the first multilayer substrate, the back surfaces of the carrier amplifier and the peak amplifier both make contact with the base member, respectively, and the back surface of the driver amplifier is connected to an interconnect layer disposed on a surface of the second multilayer substrate, the interconnect layer is connected to one end of a first via penetrating the second multilayer substrate and the first multilayer substrate, and the other end of the first via is connected to the base member.
Doherty power amplifiers with coupled line combiners
Doherty power amplifiers with coupled line combiners are provided herein. In certain embodiments, a power amplifier system includes a carrier amplifier having a carrier output that provides a first radio frequency signal, a peaking amplifier having a peaking output that provides a second radio frequency signal, and a coupled line combiner including a first conductor line connected to the peaking output, a second conductor line electromagnetically coupled to the first conductor line, a third conductor line connected to the carrier output, and a fourth conductor line electromagnetically coupled to the third conductor line and in series with the second conductor line. The power amplifier system further includes an inductor in series with the fourth conductor line and the second conductor line and operable to provide a radio frequency output signal to an output terminal.
POWER AMPLIFIER HAVING IMPROVED GATE OXIDE INTEGRITY
Power amplifiers having improved gate oxide integrity are disclosed. In particular, a dynamic asymmetric cascode bias circuit is used to provide a bias signal to a cascode power amplifier stage. The bias signal swings in synchronicity with an output signal from the power amplifier stage. By having this dynamic bias signal, the gate-drain stress on the device is reduced, preserving gate oxide integrity. Preserving gate oxide integrity helps preserve the operational profile and extend device life, providing an enhanced user experience.
AUTONOMOUS ANALOG ORTHOGONAL LOAD MODULATION POWER AMPLIFIER
A load modulation amplifier is disclosed having a first amplifier and a second amplifier. An input quadrature coupler and an output quadrature coupler are coupled between the first amplifier and the second amplifier. A splitter has a first splitter output, a splitter input coupled to a signal input, and a second splitter output coupled to a second port of the input quadrature coupler, and a variable attenuator is coupled between the first splitter output and a first port of the input quadrature coupler. An attenuation controller has a controller output that is coupled to an attenuation control input of the variable attenuator, wherein the attenuation controller autonomously generates a control signal in response to a power sample signal in proportion to a radio frequency signal received at the radio frequency signal input.
RADIO FREQUENCY POWER AMPLIFIER AND METHOD FOR MANUFACTURING DOHERTY POWER AMPLIFIER
The present disclosure provides a RF power amplifier and a method for manufacturing a Doherty power amplifier. The RF power amplifier includes at least one transistor, a harmonic termination circuit, and an impedance inverter. The harmonic termination circuit has one terminal directly connected to the drain electrode of the transistor and contributes as a part of a harmonic matching network for the transistor at the second harmonic and/or the third harmonic of the fundamental frequency. The impedance inverter is configured to perform impedance inversion of a static load or a modulated load at the fundamental frequency without affected by the harmonic termination circuit.
POWER AMPLIFICATION CIRCUIT INCLUDING PROTECTION CIRCUIT AND ELECTRONIC DEVICE INCLUDING POWER AMPLIFICATION CIRCUIT
A power amplification circuit may comprise a power distributor configured to receive a radio frequency (RF) signal and output a first RF signal and a second RF signal, a first power amplifier configured to receive the first RF signal from the power distributor and amplify the first RF signal based on a first bias, a second power amplifier configured to receive the second RF signal from the power distributor and amplify the second RF signal based on a second bias, an impedance matching circuit configured to receive the first RF signal amplified by the first power amplifier and the second RF signal amplified by the second power amplifier, and a protection circuit configured to identify a current input to a bias terminal of the second power amplifier and, control a magnitude of the current input to the bias terminal based on the identified input current.
DEVICE AND METHOD FOR SWITCHING A FREQUENCY RANGE OF A HIGH FREQUENCY AMPLIFIER
The present disclosure generally relates to a high frequency amplifier, a system and a method for setting an operating state of a high frequency amplifier. The high frequency amplifier includes at least a first amplification circuit with a first frequency range, at least one second amplification circuit with a second frequency range, a hybrid coupler circuit with an isolated port, and a termination with at least one switch device. The hybrid coupler circuit is connected to output sides of the first amplification circuit and the second amplification circuit. The termination is connected with the isolated port. The high frequency amplifier has an operating range based on the first amplification circuit and the second amplification circuit. The high frequency amplifier has a load modulation in dependence of the first amplification circuit and the second amplification circuit. A first contact of the at least one switch device is directly coupled to ground.
Power Amplifier and Doherty Amplifier Comprising the Same
Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.
POWER AMPLIFIER ARRANGEMENT COMPRISING RUTHROFF TRANSFORMER
There is provided a power amplifier arrangement for amplifying an input power signal to an output power signal. The power amplifier arrangement comprises a main amplifier having an input and an output. The power amplifier arrangement comprises at least one auxiliary amplifier, each having an input and an output. The power amplifier arrangement comprises a power divider having an input and outputs. The input of the power divider is configured to receive the input power signal. Each output of the power divider is connected to a respective input of the power amplifiers. The power amplifier arrangement comprises a Doherty combiner comprising at least one Ruthroff transformer and configured to combine all the outputs of the power amplifiers to, at an output of the Doherty combiner, produce the output power signal.