H03F1/086

AMPLIFIER CIRCUIT, DIFFERENTIAL AMPLIFIER CIRCUIT, RECEPTION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT
20230095506 · 2023-03-30 ·

An amplifier circuit according to an embodiment includes a first circuit, a second circuit, and a third circuit. The first circuit includes a first transistor connected between an input node through which an input current flows and a reference potential node. The first transistor has a gate electrode connected to the input node. The second circuit includes a low-pass filter circuit and a second transistor connected in parallel to the first transistor between the input node and the reference potential node. The second transistor has a gate electrode connected to the gate electrode of the first transistor via the low-pass filter circuit. The third circuit includes a third transistor connected between an output node through which an output current flows and the reference potential node, the third circuit having a gate electrode connected to the gate electrode of the first transistor.

TRANSIMPEDANCE AMPLIFIER CIRCUIT
20220352857 · 2022-11-03 ·

A transimpedance amplifier circuit includes an amplifier circuit that converts a current signal into a voltage signal with a gain being varied based on a control signal and a gain control circuit that generates the control signal based on an amplitude of the voltage signal. The gain control circuit includes a detection circuit that generates an amplitude-detection-signal in accordance with the amplitude of the voltage signal, a setting circuit that generates an amplitude-reference-signal, a differential voltage generation circuit that generates a differential-voltage-signal obtained by offsetting a voltage difference between the amplitude-detection-signal and the amplitude-reference-signal based on an amplitude-setting-signal, an operational transconductance amplifier (OTA) that generates a differential-current-signal based on the differential-voltage-signal, and a variable capacitor circuit having a variable capacitance being varied based on the amplitude-setting-signal, and configured to be charged/discharged by the differential-current-signal and output a charging voltage. The control signal is generated based on the charging voltage.

BRIDGED CLASS-D RF AMPLIFIER CIRCUIT

A full-bridge class-D amplifier circuit comprises first through fourth power devices. First conduction terminals of the first and third power devices are coupled to a first power supply voltage, and second conduction terminals of the second and fourth power devices are coupled to a second power supply voltage. A second conduction terminal of the first power device and a first conduction terminal of the second power device are coupled to a first amplifier output. A second conduction terminal of the third power device and a first conduction terminal of the fourth power device are coupled to a second amplifier output. Left and right driver devices respectively disposed adjacent to left and right sides of the first power device have outputs respectively coupled to left and right control terminals respectively disposed on the left and right sides of the first power device.

Amplification circuit
11664768 · 2023-05-30 · ·

An amplification circuit includes: a power supply terminal that is connected to a power supply; a first transistor that has a first source terminal, a first drain terminal, and a first gate terminal to which a high-frequency signal is inputted; a second transistor that has a second source terminal that is connected to the first drain terminal, a second drain terminal that outputs a high frequency signal, and a second gate terminal that is grounded; a capacitor that is serially arranged on a second path that connects the second gate terminal and the power supply terminal; and a switch that is serially arranged on a first path, which connects the second drain terminal and the power supply terminal, or the second path. The second drain terminal and the second gate terminal are connected to each other via the switch and the capacitor.

METHOD AND SYSTEM FOR PROCESS AND TEMPERATURE COMPENSATION IN A TRANSIMPEDANCE AMPLIFIER USING A DUAL REPLICA
20230163729 · 2023-05-25 ·

The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.

SEMICONDUCTOR DEVICE AND COMMUNICATION DEVICE COMPRISING THE SAME
20230163725 · 2023-05-25 ·

An amplifier includes a first amplification circuit, a second amplification circuit including first and second amplification transistors controlled by the first amplification circuit to generate first and second output signals and a bias transistor turned on based on a bias signal to generate the first output signal, a filter circuit including a bias capacitor connected to the first amplification transistor and the bias transistor to generate the first bias signal using a first bias voltage, and a feedback circuit configured to receive the first and second output signals and output a feedback signal that adjusts an average of the first and second output signals to correspond to a reference signal, to the first amplifier. The filter circuit adjusts a voltage of the bias capacitor such that a voltage of the bias capacitor when the amplifier is disabled corresponds to a voltage of the bias capacitor when the amplifier is enabled.

Semiconductor device and sensor system

Provided are a semiconductor device and a sensor system capable of achieving improvement of noise resistance. Thus, an output circuit 106a in the semiconductor device includes: input terminals 207n, 207p; and an output terminal 208; an output amplifier 201 connecting the input terminals 207n, 207p to the output terminal 208; a feedback element 203 returning the output terminal 208 to the input terminal 207n; a switching transistor 204; and a resistance element 206. A drain of the switching transistor 204 is connected to the input terminal 207n. The resistance element 206 is provided between a back gate of the switching transistor 204 and a power source Vdd and has impedance of a predetermined value or more for suppressing noise of a predetermined frequency generated at the input terminal 207n.

SEMICONDUCTOR DEVICE
20220337197 · 2022-10-20 ·

A semiconductor device includes input and output terminals, first and second power supply terminals, first and second transistors, and a first resistance element. In the first transistor, gate and source terminals are respectively connected to the input terminal and the first power supply terminal, a drain terminal is connected to the second power supply terminal in direct current and to the output terminal, and the gate and drain terminals are connected via the first resistance element. In the second transistor, a source terminal is connected to the first power supply terminal, and gate and drain terminals are short-circuited at a node connected to the gate terminal of the first transistor in direct current. In a lower frequency region, an impedance of the first resistance element is lower than impedances of parasitic capacitances in the first transistor between the gate and drain terminals and between the gate and source terminals.

Operational amplifier based on metal-oxide TFT, chip, and method

Disclosed is an operational amplifier based on a metal-oxide TFT. The operational amplifier includes an auxiliary amplifier and a bootstrap gain-increasing amplifier. The auxiliary amplifier adopts a two-stage positive feedback structure, including a fifth transistor, a seventh transistor, an eleventh transistor, a first amplifying unit, and a second amplifying unit. A gate of the fifth transistor serves as an input end of the operational amplifier. The bootstrap gain-increasing amplifier includes two second circuits in mutual symmetry. Each of the second circuits includes a first transistor, a second transistor, and a current source unit with a bootstrap structure.

Single servo loop controlling an automatic gain control and current sourcing mechanism

A single servo control loop for amplifier gain control based on signal power change over time or system to system, having an amplifier configured to receive an input signal on an amplifier input and generate an amplified signal on an amplifier output. The differential signal generator processes the amplified signal to generate differential output signals. The single servo control loop processes the differential output signal to generates one or more gain control signals and one or more current sink control signals. A gain control system receives a gain control signal and, responsive thereto, controls a gain of one or more amplifiers. A current sink receives a current sink control signal and, responsive thereto, draws current away from the amplifier input. Changes in input power ranges generate changes in the integration level of the differential signal outputs which are detected by the control loop, and responsive thereto, the control loop dynamically adjusts the control signals.