A compensated amplifier for use in a power converter controller. The compensated amplifier comprises a first amplifier, a second amplifier, an integrator, and an arithmetic operator. The first amplifier coupled to receive a sensed signal and a reference signal and configured to generate a first error signal in response to the sensed signal and the reference signal. The second amplifier coupled to the first amplifier and configured to generate a second error signal in response to the sensed signal and the reference signal. The integrator coupled to the first amplifier and configured to generate an integrated error signal in response to the first error signal. The arithmetic operator coupled to the integrator and to the second amplifier, wherein the arithmetic operator is configured to generate a control signal in response to the integrated error signal and the second error signal.

An amplifier circuit (200) for compensating an output signal provided at an output (212) of a circuit (210) is disclosed. The amplifier circuit (200) comprises an output transmission line (230) connected between the output (212) of the circuit (210) and an output port (240) and an amplifier (220). The amplifier (220) comprises multiple sub-amplifiers (221, 222, 223, 224), inputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled to an input transmission line (250) for receiving an error signal; and outputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled at respective places along the output transmission line (230) to inject a compensation signal to the output port (240). The error signal is derived from a reference input signal and the output signal of the circuit (210), and is amplified in the amplifier (220) into the compensation signal.

A stacked amplifier circuit includes an input stage having first and second input ports respectively defined by inputs of first and second transistors. A transformer arrangement includes first and second primary windings and first and second secondary windings. The first secondary winding is connected to an output of the first input transistor and the second secondary winding is connected to an output of the second input transistor. Portions of the magnetic fields generated by the primary windings couple to their respective secondary windings. An output stage is AC coupled to the first and second secondary windings and has an output connected to the first and second primary windings. The input stage and the output stage are arranged in a stacked configuration such that a bias current of the output stage is reused as bias current for the input stage.

An amplifier circuit for compensating an output signal provided at an output of the amplifier circuit comprises a cascade of sub-amplifiers. Each sub-amplifier of the cascade contributes to a respective part of the output signal. The cascade of sub-amplifiers comprises an end sub-amplifier and at least one preliminary sub-amplifier. At least one error correction block is coupled to apply feedforward error correction to an output of one of the at least one preliminary sub-amplifier.

A method of operating an amplifier circuit having a transformer arranged so as to establish a magnetically coupled feedback loop between and output of an amplifier and an input of the amplifier. The method includes providing a DC bias current to the amplifier, and further includes increasing the DC bias current to improve a linearity of the amplifier circuit wherein a transfer gain of the amplifier circuit remains constant when the DC bias current is increased. A loop gain of the magnetically coupled feedback loop is set by selecting a coupling factor and turn-ratio of the transformer.

An amplifier circuit (200) for compensating an output signal provided at an output (212) of a circuit (210) is disclosed. The amplifier circuit (200) comprises an output transmission line (230) connected between the output (212) of the circuit (210) and an output port (240) and an amplifier (220). The amplifier (220) comprises multiple sub-amplifiers (221, 222, 223, 224), inputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled to an input transmission line (250) for receiving an error signal; and outputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled at respective places along the output transmission line (230) to inject a compensation signal to the output port (240). The error signal is derived from a reference input signal and the output signal of the circuit (210), and is amplified in the amplifier (220) into the compensation signal.

Amplifier error correction circuits are disclosed, including in an example an amplifier error correction circuit. The amplifier error correction circuit comprises a plurality of sub-amplifiers, a first input adapted to receive an output signal of an amplifier circuit, and an error signal input adapted to receive an error signal indicative of an error in the output signal of the amplifier circuit. The amplifier error correction circuit also comprises a sub-amplifier input signal preparation circuit adapted to provide a respective portion of the error signal to each of the sub-amplifiers, and an output signal combining circuit adapted to combine outputs of the sub-amplifiers with the output signal of the amplifier circuit and to provide a combined signal to an output of the amplifier correction circuit. At least one of the sub-amplifiers comprises a cascode amplifier.

Example embodiments provide a compression technique of feedback samples for digital predistortion. A system (100) may comprise a feedback receiver (116) configured to receive feedback signal of a power amplifier (112) output and determine a set of under-sampled samples based on the feedback signal; a compressing circuitry (130) configured to: obtain the under-sampled samples; and compress the under-sampled samples, wherein two or more consecutive under-sampled samples are combined into one or more single samples based on one or more predetermined parameters; and a model coefficient training circuitry (102) configured to receive the compressed under-sampled samples and determine model coefficients for digital predistortion based on the compressed under-sampled samples. A system and a method are disclosed.

Example embodiments provide a compression technique of feedback samples for digital predistortion. A system (100) may comprise a feedback receiver (116) configured to receive feedback signal of a power amplifier (112) output and determine a set of under-sampled samples based on the feedback signal; a compressing circuitry (130) configured to: obtain the under-sampled samples; and compress the under-sampled samples, wherein two or more consecutive under-sampled samples are combined into one or more single samples based on one or more predetermined parameters; and a model coefficient training circuitry (102) configured to receive the compressed under-sampled samples and determine model coefficients for digital predistortion based on the compressed under-sampled samples. A system and a method are disclosed.

An amplifier circuit includes an amplifier having an amplifier input and an amplifier output. A transformer disposed to provide a signal for driving a load includes a primary winding in series with the amplifier output. A secondary winding of the transformer is coupled to the amplifier input where the primary winding and the secondary winding are arranged such that a portion of a magnetic field generated by the primary winding couples to the secondary winding so as to establish a magnetically coupled feedback loop from the amplifier output to the amplifier input. A loop gain of the magnetically coupled feedback loop is substantially independent of an impedance of the load and is defined at least in part by a coupling factor and turn-ratio of the transformer. The load may be included within an output load arrangement including a balun.