An improved audio amplifier system can both reduce power consumption by supporting a standby mode and shorten wake time when resuming from the standby mode. The audio amplifier system may reduce power by entering a sleep or standby state in response to a command and/or detecting that an audio input signal is not received. Further, the audio amplifier system may use a burst generator to periodically or intermittently activate the power supply during standby mode. By periodically or intermittently activating the power supply, one or more of the capacitors may be charged. By charging the capacitors during standby mode, the time to wake from standby mode may be significantly reduced. In some cases, the wake time may be reduced by several order of magnitudes (e.g., from seconds to milliseconds).

An improved audio amplifier system can both reduce power consumption by supporting a standby mode and shorten wake time when resuming from the standby mode. The audio amplifier system may reduce power by entering a sleep or standby state in response to a command and/or detecting that an audio input signal is not received. Further, the audio amplifier system may use a burst generator to periodically or intermittently activate the power supply during standby mode. By periodically or intermittently activating the power supply, one or more of the capacitors may be charged. By charging the capacitors during standby mode, the time to wake from standby mode may be significantly reduced. In some cases, the wake time may be reduced by several order of magnitudes (e.g., from seconds to milliseconds).

Various implementations include a common mode voltage controller for a self-boosting push pull amplifier. In some implementations, input signal are processed by: calculating, based upon the input signal, a maximum duty cycle to achieve a target differential in an output of the self-boosting push pull amplifier; calculating, based on the input signal, a set of control parameters associated with adjusting a common mode voltage of the output; and generating, based on the input signal, a pair of signals configured to adjust the common mode voltage of the output, wherein the pair of signals include a gain adjustment and offset based on the maximum duty cycle and the set of control parameters, and wherein the pair of signals are configured to maintain the target differential in the output of the self-boosting push pull amplifier as the common mode voltage is adjusted to a different operating point.

Implementations of a class-D amplifier can be used to amplify an input analog signal and provide to a load a multilevel amplified signal having an amplitude larger than a voltage level of a power source used by the class-D amplifier.

Implementations of a class-D amplifier can be used to amplify an input analog signal and provide to a load a multilevel amplified signal having an amplitude larger than a voltage level of a power source used by the class-D amplifier.

A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.

A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.

An amplifier includes an input circuit configured to receive an analog input signal and a feedback signal, and output an analog error signal based on the analog input signal and the feedback signal. An ADC is configured to convert the analog error signal into a digital signal in a phase domain. A digital control circuit is configured to generate a digital control signal based on the digital signal in the phase domain. An output circuit is configured to generate an amplified output signal based on the digital control signal, and a feedback circuit is configured generate the feedback signal based on the amplified output signal.

An amplifier includes an input circuit configured to receive an analog input signal and a feedback signal, and output an analog error signal based on the analog input signal and the feedback signal. An ADC is configured to convert the analog error signal into a digital signal in a phase domain. A digital control circuit is configured to generate a digital control signal based on the digital signal in the phase domain. An output circuit is configured to generate an amplified output signal based on the digital control signal, and a feedback circuit is configured generate the feedback signal based on the amplified output signal.

A class D amplifier output stage including an input for receiving an input signal, an output for providing an output signal to a load, serially coupled upper and lower switching devices configured to provide an output signal to the output, a driver circuit configured to receive the input signal, and to derive therefrom first and second drive signals for driving the upper and lower switching devices alternately from a conducting state into a non-conducting state and vice versa, such that the conducting state periods of the upper switching device with respect to those of the lower switching device are mutually exclusive and separated by dead time intervals during which both upper and lower output transistors are non-conducting. To reduce distortion and more particularly, total harmonic distortion (THD), the amplifier output stage includes a substantially linear circuit configured to provide a bidirectional current sink for residual currents from the load occurring during at least part of each dead time interval.