Patent classifications
H03F3/191
High frequency circuit and communication device
A high frequency circuit includes a transmit terminal and a transmit and receive terminal, a power amplifier that amplifies a high frequency signal inputted from the transmit terminal and outputs the high frequency signal toward the transmit and receive terminal, and an output matching circuit that is positioned on a signal path connecting the power amplifier and the transmit and receive terminal and that optimizes the output load impedance of the power amplifier. The output matching circuit includes a matching circuit coupled to an output terminal of the power amplifier, another matching circuit, and a switch that changes a connection between the matching circuits. The power amplifier and the switch are formed at a single semiconductor IC. The matching circuits are formed outside the semiconductor IC.
DEVICES AND METHODS FOR OPERATING A CHARGE PUMP
Devices and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals.
DEVICES AND METHODS FOR OPERATING A CHARGE PUMP
Devices and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals.
Integrated circuit, front-end module, and communication apparatus
An integrated circuit (IC) includes a first switch, a second switch, an amplifier electrically connected between the first switch and the second switch, and a base. The first switch, the second switch, and the amplifier are provided on the base. In a top view of the base, the amplifier is disposed between the first switch and the second switch.
Radio frequency power amplifier with harmonic suppression
In a radio frequency power amplifier with harmonic suppression, one end of an input matching circuit is connected with a radio frequency input end; and another end is connected with a base of a power amplification transistor having a collector connected with a power supply voltage through a first matching branch, and an emitter connected with a first connection point on a package substrate. The collector of the power amplification transistor is connected with a radio frequency output end through a second matching branch that is connected with the package substrate. A harmonic control circuit has a first end connected with the collector of the power amplification transistor, and a second end connected with a second connection point on the package substrate.
Power amplifier circuit and power amplifier module
A power amplifier circuit includes a first transistor; a first bias circuit that supplies a first bias current or voltage; a capacitor; a first inductor; a second inductor; a second transistor; a second bias circuit that supplies a second bias current or voltage; a third inductor; a third transistor; a third bias circuit that supplies a third bias current or voltage; and a fourth inductor.
Receiver front-end circuit and operating method thereof
A receiver front-end circuit and an operating method thereof are disclosed. The receiver front-end circuit includes a common-mode suppression circuit and a rear-stage circuit. The common-mode suppression circuit is used to receive an external input common-mode voltage signal and perform common-mode noise suppression processing on the external input common-mode voltage signal, and then output an internal input common-mode voltage signal. The rear-stage circuit is coupled to the common-mode suppression circuit and used to receive the internal input common-mode voltage signal. The dynamic swing of the internal input common-mode voltage signal is smaller than the dynamic swing of the external input common-mode voltage signal.
Multi-stage decoupling networks integrated with on-package impedance matching networks for RF power amplifiers
An electronic package houses one or more RF amplifier circuits. At least one of an input or output impedance matching network integrated on the package and electrically coupled to the gate or drain bias voltage connection, respectively, of an amplifier circuit, includes a multi-stage decoupling network. Each multi-stage decoupling network includes two or more decoupling stages. Each decoupling stage of the multi-stage decoupling network includes a resistance, inductance, and capacitance, and is configured to reduce impedance seen by the amplifier circuit at a different frequency below an operating band of the amplifier circuit. Bias voltage connections to the impedance matching circuits may be shared, and may be connected anywhere along the multi-stage decoupling network.
DEVICES AND METHODS FOR DETECTING A SATURATION CONDITION OF A POWER AMPLIFIER
The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.
DEVICES AND METHODS FOR DETECTING A SATURATION CONDITION OF A POWER AMPLIFIER
The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.