Compression control through power amplifier load adjustment. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a power amplifier bias controller including a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

Aspects of this disclosure relate to systems and methods of performing dynamic impedance tuning. Certain aspects may be performed by or include a dynamic impedance matching network. The dynamic impedance matching network can determine a desired output power for a power amplifier, true power information for the power amplifier, and an output power delivered to a load by the power amplifier. In addition, the dynamic impedance matching network can determine whether the output power satisfies the true power information. Responsive to this determination, the dynamic impedance matching network may modify a load line impedance for the power amplifier using an impedance tuning network.

Power amplification system with adjustable common base bias. A power amplification system can include a first transistor having a base coupled to a radio-frequency input. The power amplification can further include a second transistor having an emitter coupled to a collector of the first transistor and having a collector coupled to a radio-frequency output. The power amplification system can include a biasing component configured to apply a fixed biasing signal to the base of the first transistor and to apply an adjustable biasing signal to the base of the second transistor.

Power amplification system with adjustable common base bias. A power amplification system can include a first transistor having a base coupled to a radio-frequency input. The power amplification can further include a second transistor having an emitter coupled to a collector of the first transistor and having a collector coupled to a radio-frequency output. The power amplification system can include a biasing component configured to apply a fixed biasing signal to the base of the first transistor and to apply an adjustable biasing signal to the base of the second transistor.

Aspects of this disclosure relate to a mode linearization switch circuit that can adjust an effective impedance provided to an output of an amplifier. In an embodiment, an apparatus includes an amplifier configured to amplify a radio frequency (RF) signal and a mode linearization switch circuit electrically coupled to an output of the amplifier. The mode linearization switch circuit can include a capacitor, a switch in series with the capacitor, and a series LC circuit in parallel with the switch.

Aspects of this disclosure relate to a mode linearization switch circuit that can adjust an effective impedance provided to an output of an amplifier. In an embodiment, an apparatus includes an amplifier configured to amplify a radio frequency (RF) signal and a mode linearization switch circuit electrically coupled to an output of the amplifier. The mode linearization switch circuit can include a capacitor, a switch in series with the capacitor, and a series LC circuit in parallel with the switch.

An apparatus includes amplification circuitry configured to amplify a radio frequency (RF) signal. The apparatus also includes differential inductors coupled to an output of the amplification circuitry. The differential inductors include a first inductor serially coupled to a second inductor, and the differential inductors are configured to filter the RF signal and to provide a differential output.

An apparatus includes amplification circuitry configured to amplify a radio frequency (RF) signal. The apparatus also includes differential inductors coupled to an output of the amplification circuitry. The differential inductors include a first inductor serially coupled to a second inductor, and the differential inductors are configured to filter the RF signal and to provide a differential output.

The embodiments described herein provide inverse class F (class F.sup.1) amplifiers. In general, the inverse class F amplifiers are implemented with a transistor, an output inductance and a transmission line configured to approximate inverse class F voltage and current output waveforms by compensating the effects of the transistor's intrinsic output capacitance for some even harmonic signals while providing a low impedance for some odd harmonic signals. Specifically, the transistor is configured with the output inductance and transmission line to form a parallel LC circuit that resonates at the second harmonic frequency. The parallel LC circuit effectively creates high impedance for the second harmonic signals, thus blocking the capacitive reactance path to ground for those harmonic signals that the intrinsic output capacitance would otherwise provide. This facilitates the operation of the amplifier as an effective, high efficiency, inverse class F amplifier.

Provided is a power amplification module that includes: a first amplification circuit that amplifies a first signal and outputs the amplified first signal as a second signal; a second amplification circuit that amplifies the second signal and outputs the amplified second signal as a third signal; and a feedback circuit that re-inputs/feeds back the second signal outputted from the first amplification circuit to the first amplification circuit as the first signal. The operation of the first amplification circuit is halted and the first signal passes through the feedback circuit and is outputted as the second signal at the time of a low power output mode.