A phased array element includes a transmit portion having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier, a first transformer coupled to the power amplifier of a first amplifier path of the plurality of amplifier paths and a second transformer coupled to the power amplifier of a second amplifier path of the plurality of amplifier paths, a secondary winding of each of the first transformer and the second transformer coupled together by a common transformer segment, a transmit phase shifter Sswitchably coupled to the plurality of amplifier paths, a receive portion coupled to the second transformer, the receive portion having a receive path having a low noise amplifier (LNA), and a receive phase shifter coupled to the LNA.

A phased array element includes a transmit portion having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier, a first transformer coupled to the power amplifier of a first amplifier path of the plurality of amplifier paths and a second transformer coupled to the power amplifier of a second amplifier path of the plurality of amplifier paths, a secondary winding of each of the first transformer and the second transformer coupled together by a common transformer segment, a transmit phase shifter Sswitchably coupled to the plurality of amplifier paths, a receive portion coupled to the second transformer, the receive portion having a receive path having a low noise amplifier (LNA), and a receive phase shifter coupled to the LNA.

A semiconductor structure for RF applications comprises: a first μTP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.

A semiconductor structure for RF applications comprises: a first μTP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.

Methods and systems for a multi gain LNA architecture achieving minimum phase discontinuity between all the different active and passive gain modes that uses different LNA configurations and settings for single and multi-stage LNAs by a configurable combined output matching and phase adjusting circuitry.

A power limiting system and method for a low noise amplifier of a front end interface of a radio frequency communication device. A voltage regulator provides a source voltage to the low noise amplifier having a nominal voltage level that optimizes linearity of the low noise amplifier while a power level of a radio frequency input signal provided to an input of the low noise amplifier does not exceed a predetermined power level threshold. Detection circuitry detects when the power level of a radio frequency input signal exceeds the predetermined power level threshold and provides an adjust signal indicative thereof to the voltage regulator to reduce the source voltage below the nominal voltage level.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

A high-frequency 5 measurement method includes generating a test signal (TS), which is a sine-wave signal having a predetermined frequency, in which a period (τ) during which the power level is at a first power level and a period (T-τ) during which the power level is at a second power level lower than the first power level 10 are periodically repeated, inputting the test signal (TS) to a device under test (10) as an input signal, and measuring the difference between an output signal (OUT) of the device under test (10) and an ideal value of the output signal (OUT).

A high-frequency 5 measurement method includes generating a test signal (TS), which is a sine-wave signal having a predetermined frequency, in which a period (τ) during which the power level is at a first power level and a period (T-τ) during which the power level is at a second power level lower than the first power level 10 are periodically repeated, inputting the test signal (TS) to a device under test (10) as an input signal, and measuring the difference between an output signal (OUT) of the device under test (10) and an ideal value of the output signal (OUT).