Spatial power-combining devices and, more particularly, spatial power-combining devices with improved isolation are disclosed. Spatial power-combining devices are disclosed that include a thin film resistor that is configured to provide improved signal isolation. The thin film resistor may be arranged within one or more amplifier assemblies of the spatial power-combining device to reduce signal leakage between the amplifier assemblies. The thin film resistor may be formed on a carrier substrate or the thin film resistor may supported by a surface of an amplifier assembly without a carrier substrate. Spatial power-combining devices are disclosed that include a radial arrangement of amplifier assemblies, and each amplifier assembly includes an antenna structure and a thin film resistor.

A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

In various embodiments, a control circuit for a radio frequency drive of an electrosurgical device is disclosed comprising a voltage data input configured to receive voltage data, a current data input configured to receive current data, and a switching signal output configured to source a switching signal. The control circuit is configured to adjust a frequency of the switching signal based on the voltage data and the current data. The radio frequency drive comprising a transformer comprising a first tap, a second tap, a third tap, a first portion of a primary coil, a second portion of the primary coil, and a secondary coil. Two of the first, second, and third taps are selected to drive the primary coil between the two selected taps.

In various embodiments, a control circuit for a radio frequency drive of an electrosurgical device is disclosed comprising a voltage data input configured to receive voltage data, a current data input configured to receive current data, and a switching signal output configured to source a switching signal. The control circuit is configured to adjust a frequency of the switching signal based on the voltage data and the current data. The radio frequency drive comprising a transformer comprising a first tap, a second tap, a third tap, a first portion of a primary coil, a second portion of the primary coil, and a secondary coil. Two of the first, second, and third taps are selected to drive the primary coil between the two selected taps.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

The present invention provides a receiver including a first band group, a second band group and a mixer. The first band group includes at least one LNA, wherein the first band group is configured to select one first LNA to receive a first input signal to generate an amplified first input signal. The second band group includes at least one LNA, wherein the second band group is configured to select one second LNA to receive a second input signal to generate an amplified second input signal. The first band group and the second band group are coupled to a first input terminal and a second input terminal of the mixer, respectively, and the mixer receives one of the amplified first input signal and the amplified second input signal to generate an output signal.

The present invention provides a receiver including a first band group, a second band group and a mixer. The first band group includes at least one LNA, wherein the first band group is configured to select one first LNA to receive a first input signal to generate an amplified first input signal. The second band group includes at least one LNA, wherein the second band group is configured to select one second LNA to receive a second input signal to generate an amplified second input signal. The first band group and the second band group are coupled to a first input terminal and a second input terminal of the mixer, respectively, and the mixer receives one of the amplified first input signal and the amplified second input signal to generate an output signal.

A power amplifier module includes an amplifier that amplifies an input signal and outputs the amplified signal, a harmonic termination circuit that is disposed subsequent to the amplifier and that attenuates a harmonic component of the amplified signal, the harmonic termination circuit including at least one field effect transistor (FET), and a control circuit that controls a gate voltage of the at least one FET to adjust a capacitance value of a parasitic capacitance of the at least one FET. The control circuit adjusts the capacitance value of the parasitic capacitance of the at least one FET, and thereby a resonance frequency of the harmonic termination circuit is adjusted.