Described herein is a single-input hybrid Doherty power amplifier (PA). Unlike the conventional 214 Doherty PA inverter which only performs the correct load modulation at its center frequency, the hybrid Doherty PA (HDω-PA) combiner network achieves a wideband load modulation using the frequency dependence of the electrical length of the output combiner lines versus frequency for sliding the PA mode of operation. A modified theory is presented herein to allow for a single-input PA implementation. In this design, the outphasing angle is only changing with frequency and not the input power. A transmission line phase shifter is used to provide the correct frequency-dependent input phase offset ensuring the correct wideband load modulation performed by the output combiner

Disclosed is a bidirectional amplifier. The bidirectional amplifier includes a first matching circuit, a second matching circuit, an amplifier circuit connected between the first matching circuit and the second matching circuit, that amplifies a first input signal received from the first matching circuit to output the amplified first input signal to the second matching circuit, and that amplifies a second input signal received from the second matching circuit to output the amplified first input signal to the first matching circuit, and the first and second matching circuits have a symmetrical structure and operate complementary to each other.

A bidirectional RF circuit, preferably including a plurality of terminals, a switch, a transistor, a coupler, and a feedback network. The circuit can optionally include a drain matching network, an input matching network, and/or one or more tuning inputs. In some variations, the circuit can optionally include one or more impedance networks, such as an impedance network used in place of the feedback network; in some such variations, the circuit may not include a coupler, switch, and/or input matching network. A method for circuit operation, preferably including operating in an amplifier mode, operating in a rectifier mode, and/or transitioning between operation modes.

A switching system is connected to the power amplifier of an RF system. The switching system can switch the DC supply voltage to the power amplifier while handling the high DC current and the nanosecond switching speed requirements that are mandatory for most RF systems. The embodiments can rapidly control DC voltages but not interfere with the optimized operation of the RF transistor. The embodiments provide a desired sharp turn-on leading edge for an RF pulse while eliminating the extremely long and undesirable ramp down that typically occurs beyond the desired RF pulse period.

A switching system is connected to the power amplifier of an RF system. The switching system can switch the DC supply voltage to the power amplifier while handling the high DC current and the nanosecond switching speed requirements that are mandatory for most RF systems. The embodiments can rapidly control DC voltages but not interfere with the optimized operation of the RF transistor. The embodiments provide a desired sharp turn-on leading edge for an RF pulse while eliminating the extremely long and undesirable ramp down that typically occurs beyond the desired RF pulse period.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.

A method is provided for reducing non-linear effects in an electronic circuit including an amplifier. The method may include receiving a modulated signal at an input of the amplifier, the modulated signal comprising a baseband signal modulated by an oscillator frequency. The method may further include substantially attenuating counter-intermodulation in the modulated signal caused by harmonics of the oscillator frequency and the baseband signal by a resonant circuit. In some embodiments, the resonant circuit may include at least one inductive element and one capacitive element coupled to the at least one inductive element, the at least one inductive element and the at least one capacitive element configured to substantially attenuate counter-intermodulation in the modulated signal.

A method is provided for reducing non-linear effects in an electronic circuit including an amplifier. The method may include receiving a modulated signal at an input of the amplifier, the modulated signal comprising a baseband signal modulated by an oscillator frequency. The method may further include substantially attenuating counter-intermodulation in the modulated signal caused by harmonics of the oscillator frequency and the baseband signal by a resonant circuit. In some embodiments, the resonant circuit may include at least one inductive element and one capacitive element coupled to the at least one inductive element, the at least one inductive element and the at least one capacitive element configured to substantially attenuate counter-intermodulation in the modulated signal.

A transformer is provided. The transformer includes at least one first primary turn; at least one second primary turn; and a first secondary turn and a second secondary turn. The first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn. The first secondary turn and the second secondary turn are arranged one above the other.