Patent classifications
H03F3/193
DIFFERENTIAL AMPLIFIER CIRCUIT AND RADAR DEVICE
A differential amplifier circuit comprises: first and second input terminals; first and second output terminals; a first transistor comprising a gate terminal connected to the first input terminal; a second transistor comprising a gate terminal connected to the second input terminal; a first resistor connected between the source terminal of the first transistor and the source terminal of the second transistor; a third transistor comprising a drain terminal connected to the source terminal of the first transistor, a gate terminal connected to the drain terminal of the first transistor, and a source terminal connected to the first output terminal; a fourth transistor comprising a drain terminal connected to the source terminal of the second transistor, a gate terminal connected to the drain terminal of the second transistor, and a source terminal connected to the second output terminal; first to fourth current sources; and second and third resistors.
DIFFERENTIAL AMPLIFIER CIRCUIT AND RADAR DEVICE
A differential amplifier circuit comprises: first and second input terminals; first and second output terminals; a first transistor comprising a gate terminal connected to the first input terminal; a second transistor comprising a gate terminal connected to the second input terminal; a first resistor connected between the source terminal of the first transistor and the source terminal of the second transistor; a third transistor comprising a drain terminal connected to the source terminal of the first transistor, a gate terminal connected to the drain terminal of the first transistor, and a source terminal connected to the first output terminal; a fourth transistor comprising a drain terminal connected to the source terminal of the second transistor, a gate terminal connected to the drain terminal of the second transistor, and a source terminal connected to the second output terminal; first to fourth current sources; and second and third resistors.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a first semiconductor layer formed over the substrate, a second semiconductor layer formed over the first semiconductor layer, a third semiconductor layer formed over the second semiconductor layer, and a gate electrode, a source electrode, and a drain electrode that are formed over the third semiconductor layer. The first semiconductor layer includes a first nitride semiconductor. The second semiconductor includes a second nitride semiconductor. The third semiconductor layer includes a third nitride semiconductor. The concentration of oxygen included in the second semiconductor layer is less than 5.0×10.sup.18 cm.sup.−3. The concentration of oxygen included in the third semiconductor layer is greater than or equal to 5.0×10.sup.18 cm.sup.−3.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a first semiconductor layer formed over the substrate, a second semiconductor layer formed over the first semiconductor layer, a third semiconductor layer formed over the second semiconductor layer, and a gate electrode, a source electrode, and a drain electrode that are formed over the third semiconductor layer. The first semiconductor layer includes a first nitride semiconductor. The second semiconductor includes a second nitride semiconductor. The third semiconductor layer includes a third nitride semiconductor. The concentration of oxygen included in the second semiconductor layer is less than 5.0×10.sup.18 cm.sup.−3. The concentration of oxygen included in the third semiconductor layer is greater than or equal to 5.0×10.sup.18 cm.sup.−3.
Amplifier Control System
A method, system and apparatus provide operation of an RF amplifier at a power level responsive to detected or expected conditions such as weather attenuation.
Amplifier Control System
A method, system and apparatus provide operation of an RF amplifier at a power level responsive to detected or expected conditions such as weather attenuation.
PHEMT COMPONENTS WITH ENHANCED LINEARITY PERFORMANCE
pHEMT-based circuits and methods of improving the linearity thereof. One example pHEMT circuit includes a pHEMT connected between an input terminal and a load and a non-linear resistance connected to the pHEMT. The pHEMT produces a first harmonic signal at the load responsive to being driven by an input signal of a fundamental frequency received at the input terminal, the first harmonic signal having a first phase. The non-linear resistance has a resistance selected to produce a second harmonic signal at the load having a second phase opposite to the first phase. Methods can include determining a first amplitude and a first phase of a first harmonic signal produced at the load by a pHEMT in an ON state, and tuning the non-linear resistance to produce at the load a second harmonic signal having a second amplitude and a second phase that minimizes a net harmonic signal at the load.
PHEMT COMPONENTS WITH ENHANCED LINEARITY PERFORMANCE
pHEMT-based circuits and methods of improving the linearity thereof. One example pHEMT circuit includes a pHEMT connected between an input terminal and a load and a non-linear resistance connected to the pHEMT. The pHEMT produces a first harmonic signal at the load responsive to being driven by an input signal of a fundamental frequency received at the input terminal, the first harmonic signal having a first phase. The non-linear resistance has a resistance selected to produce a second harmonic signal at the load having a second phase opposite to the first phase. Methods can include determining a first amplitude and a first phase of a first harmonic signal produced at the load by a pHEMT in an ON state, and tuning the non-linear resistance to produce at the load a second harmonic signal having a second amplitude and a second phase that minimizes a net harmonic signal at the load.
Low noise amplifier
The embodiments of the present disclosure provide a low noise amplifier including: an input stage circuit; a bias circuit, adapted for providing bias to the input stage circuit; an output stage circuit; a first amplifier and a second amplifier; a first middle stage circuit, adapted for implementing inter-stage matching, signal coupling and isolation between the input stage circuit and the first amplifier; and a second middle stage circuit, adapted for implementing inter-stage matching between the first amplifier and the second amplifier, wherein the first middle stage circuit is coupled with the second middle stage circuit via the first amplifier, and the second middle stage circuit is coupled with the output stage circuit via the second amplifier. Accordingly, amplifier gain of LNA is improved without increasing power consumption.
Low noise amplifier
The embodiments of the present disclosure provide a low noise amplifier including: an input stage circuit; a bias circuit, adapted for providing bias to the input stage circuit; an output stage circuit; a first amplifier and a second amplifier; a first middle stage circuit, adapted for implementing inter-stage matching, signal coupling and isolation between the input stage circuit and the first amplifier; and a second middle stage circuit, adapted for implementing inter-stage matching between the first amplifier and the second amplifier, wherein the first middle stage circuit is coupled with the second middle stage circuit via the first amplifier, and the second middle stage circuit is coupled with the output stage circuit via the second amplifier. Accordingly, amplifier gain of LNA is improved without increasing power consumption.