Disclosed in the present invention are a balanced radio frequency power amplifier, a chip and a communication terminal. The radio frequency power amplifier divides, by means of a 90-degree power splitter unit, a radio frequency input signal into two equal-amplitude signals having a phase difference of 90 degrees, the two radio frequency input signals are amplified and then inputted into an adjustable 90-degree power combiner, and the values of a adjustable capacitor and an adjustable resistor in the adjustable 90-degree power combiner are controlled by means of a control unit, so as to synthesize the two radio frequency input signals into one radio frequency input signal when the phase difference and amplitude difference of the two signals at different frequencies are the smallest, and to input the radio frequency input signal into a circuit of the next stage by means of a specific radio frequency transmission path.

Disclosed in the present invention are a balanced radio frequency power amplifier, a chip and a communication terminal. The radio frequency power amplifier divides, by means of a 90-degree power splitter unit, a radio frequency input signal into two equal-amplitude signals having a phase difference of 90 degrees, the two radio frequency input signals are amplified and then inputted into an adjustable 90-degree power combiner, and the values of a adjustable capacitor and an adjustable resistor in the adjustable 90-degree power combiner are controlled by means of a control unit, so as to synthesize the two radio frequency input signals into one radio frequency input signal when the phase difference and amplitude difference of the two signals at different frequencies are the smallest, and to input the radio frequency input signal into a circuit of the next stage by means of a specific radio frequency transmission path.

Examples of the disclosure include an amplifier system comprising an amplifier having an input to receive an input signal, and an output to provide an amplified output signal, the amplifier having a power level indicative of at least one of the input signal power and the amplified output signal power, and a linearizer coupled to the amplifier and having a plurality of modes of operation including a fully disabled mode and a fully enabled mode, the linearizer being configured to determine the power level of the amplifier, select a mode of operation of the plurality of modes of operation based on the power level of the amplifier, determine one or more linearization parameters corresponding to the selected mode of operation, and control linearization of the amplified output signal based on the determined one or more linearization parameters.

A transimpedance amplifier (TIA) circuit disclosed includes an input terminal, a first TIA circuit, a second TIA circuit, a field effect transistor (FET), and a gain control circuit. The first TIA circuit outputs a voltage signal from a first output in accordance with an input current received at a first input electrically connected to the input terminal. The second TIA circuit outputs a reference signal from a second output. The FET varies a resistance between a first current terminal and a second current terminal in accordance with a control signal applied to a control terminal. The first current terminal is electrically connected to the input terminal. The second current terminal is electrically connected to the second output of the second TIA circuit. The gain control circuit detects an amplitude of the voltage signal and generates the control signal according to a detection result of the amplitude.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.

Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.

An amplifying device includes a radio frequency (RF) signal input terminal to which an RF signal is input, a buffer circuit, a linearizer including a transistor, a power amplifier, and a control circuit. The control circuit outputs a first gate voltage when a level of the RF signal input is a first level, the first gate voltage causing the transistor to perform a class B operation. The control circuit outputs a second gate voltage when the level of the RF signal is a second level higher than the first level, the second gate voltage causing the transistor to perform a class AB operation. Output impedance of the buffer circuit that is seen from an input side of the linearizer is set such that a reflection loss of the RF signal input from the buffer circuit to the linearizer is a predetermined level or less.

A single servo control loop for amplifier gain control based on signal power change over time or system to system, having an amplifier configured to receive an input signal on an amplifier input and generate an amplified signal on an amplifier output. The differential signal generator processes the amplified signal to generate differential output signals. The single servo control loop processes the differential output signal to generates one or more gain control signals and one or more current sink control signals. A gain control system receives a gain control signal and, responsive thereto, controls a gain of one or more amplifiers. A current sink receives a current sink control signal and, responsive thereto, draws current away from the amplifier input. Changes in input power ranges generate changes in the integration level of the differential signal outputs which are detected by the control loop, and responsive thereto, the control loop dynamically adjusts the control signals.