H03F3/193

RADIO FREQUENCY SPLITTER AND FRONT-END MODULE

A radio-frequency (RF) splitter is provided. The RF splitter includes a common branch node configured to transfer an RF signal, input from an input port, to at least one of first and second output ports, first and second branch nodes electrically connected between the common branch node and the first and second output ports, first and second series switches configured to control switching operations to electrically connect the common branch node and the first and second branch nodes to each other, first and second inductors electrically connected between the common branch node and the first and second branch nodes, a resistor electrically connected between the first and second branch nodes, and first and second shunt switches configured to control switching operations to electrically connect the first and second branch nodes and the resistor to each other.

Amplifier devices with phase distortion compensation and methods of manufacture thereof
11146220 · 2021-10-12 · ·

The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. Specifically, the amplifiers described herein include a phase distortion compensation circuit that can compensate for input impedance variations that could otherwise lead to reduced efficiency and power performance. In one specific embodiment, the phase distortion compensation circuit is used to compensate for input impedance variations in the peaking amplifiers of a Doherty amplifier. In such embodiments, the phase distortion compensation circuit can absorb the non-linear input impedances of the peaking amplifiers in a way that may facilitate improved phase maintenance between the carrier and peaking stages of the Doherty amplifier.

Amplifier devices with phase distortion compensation and methods of manufacture thereof
11146220 · 2021-10-12 · ·

The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. Specifically, the amplifiers described herein include a phase distortion compensation circuit that can compensate for input impedance variations that could otherwise lead to reduced efficiency and power performance. In one specific embodiment, the phase distortion compensation circuit is used to compensate for input impedance variations in the peaking amplifiers of a Doherty amplifier. In such embodiments, the phase distortion compensation circuit can absorb the non-linear input impedances of the peaking amplifiers in a way that may facilitate improved phase maintenance between the carrier and peaking stages of the Doherty amplifier.

Balancing circuit capable of compensating bandwidth attenuation introduced by interference between signals

A balancing circuit which may compensate for bandwidth attenuation introduced by interference between signals includes an amplifying circuit, a rising edge detection circuit and/or a falling edge detection circuit. By means of detecting the rising/falling edge of an original signal, the resulting pulse signal contains the phase information of a single “0” bit and a single “1” bit in the original signal, thus the phase of a rising edge or the phase of a falling edge of the original signal may be compensated respectively, so as to compensate for the high-frequency attenuation caused by interference between signals.

Balancing circuit capable of compensating bandwidth attenuation introduced by interference between signals

A balancing circuit which may compensate for bandwidth attenuation introduced by interference between signals includes an amplifying circuit, a rising edge detection circuit and/or a falling edge detection circuit. By means of detecting the rising/falling edge of an original signal, the resulting pulse signal contains the phase information of a single “0” bit and a single “1” bit in the original signal, thus the phase of a rising edge or the phase of a falling edge of the original signal may be compensated respectively, so as to compensate for the high-frequency attenuation caused by interference between signals.

RESONATOR CIRCUIT

The invention relates to a resonator circuit, the resonator circuit comprising a transformer comprising a primary winding and a secondary winding, wherein the primary winding is inductively coupled with the secondary winding, a primary capacitor being connected to the primary winding, the primary capacitor and the primary winding forming a primary circuit, and a secondary capacitor being connected to the secondary winding, the secondary capacitor and the secondary winding forming a secondary circuit, wherein the resonator circuit has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.

GROUP III NITRIDE-BASED RADIO FREQUENCY TRANSISTOR AMPLIFIERS HAVING SOURCE, GATE AND/OR DRAIN CONDUCTIVE VIAS

RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.

GROUP III NITRIDE-BASED RADIO FREQUENCY TRANSISTOR AMPLIFIERS HAVING SOURCE, GATE AND/OR DRAIN CONDUCTIVE VIAS

RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.

STACKED RF CIRCUIT TOPOLOGY USING TRANSISTOR DIE WITH THROUGH SILICON CARBIDE VIAS ON GATE AND/OR DRAIN
20210313285 · 2021-10-07 ·

A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.

STACKED RF CIRCUIT TOPOLOGY USING TRANSISTOR DIE WITH THROUGH SILICON CARBIDE VIAS ON GATE AND/OR DRAIN
20210313285 · 2021-10-07 ·

A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.