Bias arrangements for amplifiers are disclosed. An example bias arrangement for an amplifier includes a bias circuit, configured to produce a bias signal for the amplifier; a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal produced by the bias circuit to produce a modified bias signal to be provided to the amplifier; and a coupling circuit, configured to couple the bias circuit and the linearization circuit. Providing separate bias and linearization circuits coupled to one another by a coupling circuit allows separating a linearization operation from a biasing loop to overcome some drawbacks of prior art bias arrangements that utilize a single biasing loop.

Various embodiments relate to a packaged radio frequency (RF) amplifier device implementing a split bondwire where the direct ground connection of an output capacitor is replaced with a set of bondwires connecting to ground in a direction opposite to the wires connecting to the output of a transistor to an output pad. This is done in order to reduce the effects of mutual inductance between the various bondwires associated with the output of the RF amplifier device.

Various embodiments relate to a packaged radio frequency (RF) amplifier device implementing a split bondwire where the direct ground connection of an output capacitor is replaced with a set of bondwires connecting to ground in a direction opposite to the wires connecting to the output of a transistor to an output pad. This is done in order to reduce the effects of mutual inductance between the various bondwires associated with the output of the RF amplifier device.

A wideband power amplifier is presented. The wideband power amplifier configured to be coupled to a load having an impedance Z.sub.L, where the wideband power amplifier comprises: a quadrature coupler; a carrier amplifier coupled to the quadrature coupler; a peak amplifier coupled to the quadrature coupler; wherein the carrier amplifier saturates at an input power level lower than the input power level at which the peak amplifier saturates; wherein each of the carrier amplifier and the peak amplifier has a termination impedance of approximately R.sub.opt, where R.sub.opt is the optimum impedance at which the carrier amplifier and the peak amplifier will deliver rated max powers; a impedance transformer, coupled to the carrier amplifier having a characteristic impedance of 2*R.sub.opt; an impedance transformer, coupled to the peak amplifier and the impedance transformer; wherein the impedance transformer is configured transform a load impedance Z.sub.L to 2*R.sub.opt.

A wideband power amplifier is presented. The wideband power amplifier configured to be coupled to a load having an impedance Z.sub.L, where the wideband power amplifier comprises: a quadrature coupler; a carrier amplifier coupled to the quadrature coupler; a peak amplifier coupled to the quadrature coupler; wherein the carrier amplifier saturates at an input power level lower than the input power level at which the peak amplifier saturates; wherein each of the carrier amplifier and the peak amplifier has a termination impedance of approximately R.sub.opt, where R.sub.opt is the optimum impedance at which the carrier amplifier and the peak amplifier will deliver rated max powers; a impedance transformer, coupled to the carrier amplifier having a characteristic impedance of 2*R.sub.opt; an impedance transformer, coupled to the peak amplifier and the impedance transformer; wherein the impedance transformer is configured transform a load impedance Z.sub.L to 2*R.sub.opt.

An amplifier comprises a common emitter stage coupled to a first and a second input, a common base stage coupled to the common emitter stage and to a first and a second output, and a cancellation path coupled to the common emitter stage and the common base stage and to the first and second outputs. The cancellation path generates a first cancellation signal that is 180 degrees out of phase with a first leakage signal at the first output and a second cancellation signal that is 180 degrees out of phase with a second leakage signal at the second output. The cancellation path comprises a first cancellation transistor coupled to the common emitter stage and the common base stage and to the first output and a second cancellation transistor coupled to the common emitter stage and the common base stage and to the second output.

A packaged RF power amplifier (RFPA) configured to increase video bandwidth is disclosed as well is a process for implementing a RF power device to increase video bandwidth. The RF power device including at least one transistor; an output matching circuit coupled to an output lead and to the at least one transistor; at least one bias feed circuit coupled to the at least one transistor; and at least one coaxial resonator coupled between the at least one transistor and the at least one bias feed circuit.

A packaged RF power amplifier (RFPA) configured to increase video bandwidth is disclosed as well is a process for implementing a RF power device to increase video bandwidth. The RF power device including at least one transistor; an output matching circuit coupled to an output lead and to the at least one transistor; at least one bias feed circuit coupled to the at least one transistor; and at least one coaxial resonator coupled between the at least one transistor and the at least one bias feed circuit.

A power control circuit includes a negative feedback loop, and a radio frequency signal path including a first NMOS transistor having a gate configured as a radio frequency signal input end, a drain connected with a source of a second NMOS transistor, and a source connected with a ground terminal. A drain of the second NMOS transistor is configured as a radio frequency signal output end and connected with a first voltage source. The negative feedback loop includes a third NMOS transistor having a gate connected with an output end of a differential amplifier, a source connected with the ground terminal, and a drain connected with a source of a fourth NMOS transistor having a gate connected with a reverse input end of the differential amplifier and with a second voltage source, and a drain connected with a forward input end and a first bias current source.

A power control circuit includes a negative feedback loop, and a radio frequency signal path including a first NMOS transistor having a gate configured as a radio frequency signal input end, a drain connected with a source of a second NMOS transistor, and a source connected with a ground terminal. A drain of the second NMOS transistor is configured as a radio frequency signal output end and connected with a first voltage source. The negative feedback loop includes a third NMOS transistor having a gate connected with an output end of a differential amplifier, a source connected with the ground terminal, and a drain connected with a source of a fourth NMOS transistor having a gate connected with a reverse input end of the differential amplifier and with a second voltage source, and a drain connected with a forward input end and a first bias current source.