Patent classifications
H03F3/193
SYSTEM AND METHOD OF IMPROVING BLOCKING IMMUNITY OF RADIO FREQUENCY TRANSCEIVER FRONT END
A power amplifier for a radio frequency transceiver including a driver, a disable circuit, and a bias circuit. The driver includes a source node for receiving a drive voltage when enabled and includes an output node that is susceptible to strong blocker signals when disabled. The bias circuit includes first and second bias nodes for driving the voltage level of the source and output nodes, respectively, to suitable bias voltage levels to minimize impact of blocker signals. The disable circuit includes switch circuits to couple the driver to the bias circuit in the disable mode. The bias circuit may include at least one voltage source. The bias circuit may be coupled to a supply voltage and may include a voltage divider coupled between the source and output nodes. The bias circuit may include a source-follower circuit to isolate the bias voltages from variations of the supply voltage.
SYSTEM AND METHOD OF IMPROVING BLOCKING IMMUNITY OF RADIO FREQUENCY TRANSCEIVER FRONT END
A power amplifier for a radio frequency transceiver including a driver, a disable circuit, and a bias circuit. The driver includes a source node for receiving a drive voltage when enabled and includes an output node that is susceptible to strong blocker signals when disabled. The bias circuit includes first and second bias nodes for driving the voltage level of the source and output nodes, respectively, to suitable bias voltage levels to minimize impact of blocker signals. The disable circuit includes switch circuits to couple the driver to the bias circuit in the disable mode. The bias circuit may include at least one voltage source. The bias circuit may be coupled to a supply voltage and may include a voltage divider coupled between the source and output nodes. The bias circuit may include a source-follower circuit to isolate the bias voltages from variations of the supply voltage.
Semiconductor Having a Backside Wafer Cavity for Radio Frequency (RF) Passive Device Integration and/or Improved Cooling and Process of Implementing the Same
A semiconductor device configured for a radio frequency (RF) application and further configured for passive device integration and/or improved cooling includes a substrate; an active region portion arranged on the substrate, the active region portion includes at least one radio frequency (RF) transistor amplifier; a cavity arranged within the substrate; and one or more radio frequency (RF) devices arranged in the cavity.
Semiconductor Having a Backside Wafer Cavity for Radio Frequency (RF) Passive Device Integration and/or Improved Cooling and Process of Implementing the Same
A semiconductor device configured for a radio frequency (RF) application and further configured for passive device integration and/or improved cooling includes a substrate; an active region portion arranged on the substrate, the active region portion includes at least one radio frequency (RF) transistor amplifier; a cavity arranged within the substrate; and one or more radio frequency (RF) devices arranged in the cavity.
Bias techniques for amplifiers with mixed polarity transistor stacks
Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.
Bias techniques for amplifiers with mixed polarity transistor stacks
Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.
MINIATURIZED WIDEBAND ACTIVE BALUN WITH CONTROLLABLE EQUALIZATION
Embodiments of active baluns are disclosed. In an embodiment, an active balun includes input terminals configured to receive a single-ended input signal and a linear redriver configured to transform the single-ended input signal into a differential output signal.
MINIATURIZED WIDEBAND ACTIVE BALUN WITH CONTROLLABLE EQUALIZATION
Embodiments of active baluns are disclosed. In an embodiment, an active balun includes input terminals configured to receive a single-ended input signal and a linear redriver configured to transform the single-ended input signal into a differential output signal.
Amplifier system for use as high sensitivity selective receiver without frequency conversion
An amplifying system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The amplifying system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.
Amplifier system for use as high sensitivity selective receiver without frequency conversion
An amplifying system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The amplifying system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.