Examples disclosed herein relate to a vector modulator architecture, having an input splitter network configured to receive a radio frequency (RF) input signal and generate a plurality of quadrature signals at different phases, a variable gain amplifier (VGA) stage coupled to the input splitter network and configured to apply a first gain to one or more of the plurality of quadrature signals, a power combiner coupled to the VGA stage and configured to combine the plurality of quadrature signals into a combined RF signal, and a power amplifier (PA) stage coupled to the power combiner and configured to apply a second gain to the combined RF signal and generate an output RF signal. Other examples disclosed herein relate to an antenna system for autonomous vehicles and a radar system for use in an autonomous driving vehicle.

A cascode amplifier circuit comprising a power amplifier block having a first transistor and a second transistor. The amplifier circuit also comprises: a bias generator block coupled to the first transistor and being configured to provide a reference voltage to the power amplifier block; and a current control block coupled to the second transistor of the power amplifier block, the current control block being configured to adjust a gate bias to the second transistor of the power amplifier block to maintain a constant quiescent current.

The invention provides a radio frequency (RF) module and associated method with envelope tracking (ET) power supply in a device. The RF module may comprise a plurality of transmitters, an ET output, and an ET multiplexer. Each said transmitter may comprise an ET port and one or more RF outputs, and may be configured for providing an RF signal to one of said one or more RF outputs, and providing an ET signal, which reflects an envelope of the RF signal, to the ET port. The ET multiplexer may be coupled between said ET ports of the plurality of transmitters and the ET output, for selectively relaying one of said ET ports to the ET output.

A programmable gain amplifier includes a programmable resistor ladder deployed across N.sub.max junction nodes and controlled by N.sub.max−1 resistor control signals, where N.sub.max is an integer greater than one; a common-gate cascode amplifier multiplexer comprising N.sub.max common-gate cascode amplifiers configured to receive N.sub.max internal voltages at the N.sub.max junction nodes and output N.sub.max output currents in accordance with N.sub.max amplifier control signals, respectively, to an output node that is loaded with a load; and an AC (alternate current) coupling capacitor configured to couple an input node to the first junction node.

A receiver topology for supporting various combinations of interband carrier aggregation (CA) signals, intraband non-contiguous CA and non-CA signals having different combinations of signals aggregated therein.

A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.

A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.

A radio frequency circuit includes a first acoustic wave filter that is connected to a common terminal and includes a first acoustic wave resonator, a first LC filter that is connected to the common terminal via the first acoustic wave filter and includes at least one of an inductor or a capacitor, a second acoustic wave filter that is connected to the common terminal and includes a second acoustic wave resonator, and a second LC filter that is connected to the common terminal via the second acoustic wave filter and includes at least one of an inductor or a capacitor.

A Digital Power-Amplifier (DPA) system includes a power amplifier (PA) circuit having control inputs and an output for generating output signals, and an adaptive control circuit that comprises an input interface, an output interface, a memory storing an adaptive control algorithm and a processor performing instructions based on the adaptive control algorithm in connection with the memory, wherein the input interface receives input-state signals and output signals of the DPA circuit, wherein the adaptive control algorithm determines, in response to the input-state signals and the output signals, control parameters of control signals transmitted to the control inputs from the output interface for controlling operations of the DPA circuit.

A communication circuit, including a first supply modulator configured to provide a first supply voltage; a first power amplifier configured to generate a first output signal by amplifying a first input signal corresponding to a first operation frequency band; a second power amplifier configured to generate a second output signal by amplifying a second input signal corresponding to a second operation frequency band; and a switching circuit configured to selectively provide the first supply voltage from the first supply modulator to the second power amplifier based on a first switching signal according to an operation mode.