Patent classifications
H03F3/195
POWER AMPLIFIER SYSTEM WITH INCREASED OUTPUT POWER FOR ENVELOPE TRACKING APPLICATIONS
A power amplifier system comprises an envelope tracker configured to generate a supply voltage that changes in relation to an envelope of a radio frequency signal, a power amplifier configured to amplify the radio frequency signal, and an adaptation circuit configured to adapt the supply voltage to provide operating power to the power amplifier. The adaptation circuit includes at least one Gallium Nitride field-effect-transistor configured to generate the operating power in response to an increased swing of the supply voltage and at least one linearizing circuit configured to linearize an operation of the Gallium Nitride field-effect-transistor.
PROTECTION CIRCUIT AND METHOD
A protection circuit and method for protecting driven circuitry against voltage peaks in a radio frequency signal, “V.sub.RF”, past a predetermined voltage level “V.sub.detect”. The protection circuit includes an input for receiving the radio frequency signal. The protection circuit also includes at least one amplification stage coupled to the input. The amplification stage is operable to produce an amplified signal based on V.sub.detect−V.sub.RF. The protection circuit further includes a hold circuit operable to determine, from the amplified signal produced by the amplification stage, whether a peak voltage V.sub.peak of the radio frequency signal exceeds V.sub.detect. The hold circuit is operable to output a first detection value if V.sub.peak exceeds V.sub.detect. The hold circuit is operable to output a second detection value if V.sub.peak does not exceed V.sub.detect. The protection circuit also includes a latch circuit operable to latch the detection value outputted by the hold circuit.
PROTECTION CIRCUIT AND METHOD
A protection circuit and method for protecting driven circuitry against voltage peaks in a radio frequency signal, “V.sub.RF”, past a predetermined voltage level “V.sub.detect”. The protection circuit includes an input for receiving the radio frequency signal. The protection circuit also includes at least one amplification stage coupled to the input. The amplification stage is operable to produce an amplified signal based on V.sub.detect−V.sub.RF. The protection circuit further includes a hold circuit operable to determine, from the amplified signal produced by the amplification stage, whether a peak voltage V.sub.peak of the radio frequency signal exceeds V.sub.detect. The hold circuit is operable to output a first detection value if V.sub.peak exceeds V.sub.detect. The hold circuit is operable to output a second detection value if V.sub.peak does not exceed V.sub.detect. The protection circuit also includes a latch circuit operable to latch the detection value outputted by the hold circuit.
HIGH-FREQUENCY AMPLIFIER
A high-frequency amplifier includes a driver amplifier configured to amplify an input high-frequency signal, a Doherty amplifier, including a carrier amplifier and a peak amplifier, and configured to further amplify a signal output from the driver amplifier, a first multilayer substrate, a second multilayer substrate laminated to overlap the first multilayer substrate, and a base member mounted with the first multilayer substrate and the second multilayer substrate, wherein the driver amplifier is mounted on the second multilayer substrate, the carrier amplifier and the peak amplifier are mounted on the first multilayer substrate, the driver amplifier, the carrier amplifier, and the peak amplifier have a front surface forming a predetermined circuit, and a back surface located on an opposite side from the front surface, respectively, the front surface of the driver amplifier opposes the first multilayer substrate, and the back surface of the driver amplifier is separated from the first multilayer substrate, the back surfaces of the carrier amplifier and the peak amplifier both make contact with the base member, respectively, and the back surface of the driver amplifier is connected to an interconnect layer disposed on a surface of the second multilayer substrate, the interconnect layer is connected to one end of a first via penetrating the second multilayer substrate and the first multilayer substrate, and the other end of the first via is connected to the base member.
Notch circuit and power amplifier module
A notch circuit and a power amplifier module capable of reducing self-interference in a transceiver are provided. The transceiver includes a transmitter and a receiver, and the transmitter causes self-interference to the receiver. The transmitter includes a power amplifier module and the power amplifier module includes a notch circuit and a power amplifier. The notch circuit includes an inductor and a capacitor. The power amplifier amplifies an input transmission signal to generate an output transmission signal. The inductor receives a supply voltage. An amplitude of the supply voltage varies with the first input transmission signal. The capacitor is electrically connected to the inductor. The first output transmission signal (Tx_out1) is attenuated when a modulated frequency of the supply voltage is corresponding to a stopband.
Semiconductor integrated circuit and receiver
According to one embodiment, a semiconductor integrated circuit includes first and second power supply lines, first and second nodes, and first and second circuits. The first circuit is configured to supply a first current to the second power supply line, from the first node or the second node. The second circuit is configured to supply a second current from the first power supply line to the first node based on a magnitude of the first current, and to supply a third current from the first power supply line to the second node based on the magnitude of the first current.
Semiconductor integrated circuit and receiver
According to one embodiment, a semiconductor integrated circuit includes first and second power supply lines, first and second nodes, and first and second circuits. The first circuit is configured to supply a first current to the second power supply line, from the first node or the second node. The second circuit is configured to supply a second current from the first power supply line to the first node based on a magnitude of the first current, and to supply a third current from the first power supply line to the second node based on the magnitude of the first current.
Cascode amplifier bias circuits
Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
Cascode amplifier bias circuits
Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
Electronic device and bandwidth adaptation-based power control method in electronic device
Provided is an electronic device that includes a communication processor; a transceiver electrically connected to the communication processor; a first power amplifier electrically connected to the transceiver; a first antenna electrically connected to the first power amplifier; and a first supply adjustor electrically connected to the communication processor and the first power amplifier. The communication processor can be set to perform a first determination about whether a carrier bandwidth part of a first signal transmitted through the first antenna exceeds a first threshold value, perform a second determination about whether the power of the first signal exceeds a second threshold value, select a first tracking mode as an envelope tracking mode or an average power tracking mode on the basis of at least a portion of the first determination and the second determination, and control the first supply adjustor using the selected first tracking mode.