A power amplifier has an amplifier cell with an input terminal receiving an input signal and an output terminal providing an output signal. A bias network is coupled to the output terminal of the amplifier cell to provide a bias signal to the amplifier cell. A shutdown circuit is coupled to the bias network to disable the bias network in response to the input signal. The shutdown circuit has a transistor with a first conduction terminal coupled to the bias network, a second conduction terminal coupled to a power supply terminal. The shutdown circuit further has a first resistor with a first terminal coupled to the input terminal, and a second resistor with a first terminal coupled to a second terminal of the first resistor at a node, and a second terminal coupled to the power supply terminal. The control terminal of the transistor is coupled to the node.

A power amplifier has an amplifier cell with an input terminal receiving an input signal and an output terminal providing an output signal. A bias network is coupled to the output terminal of the amplifier cell to provide a bias signal to the amplifier cell. A shutdown circuit is coupled to the bias network to disable the bias network in response to the input signal. The shutdown circuit has a transistor with a first conduction terminal coupled to the bias network, a second conduction terminal coupled to a power supply terminal. The shutdown circuit further has a first resistor with a first terminal coupled to the input terminal, and a second resistor with a first terminal coupled to a second terminal of the first resistor at a node, and a second terminal coupled to the power supply terminal. The control terminal of the transistor is coupled to the node.

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. Radio-frequency power amplifier circuitry may include an amplifier, an input transformer for coupling radio-frequency input signals to the amplifier, an active inductor load coupled to the input transformer, and a second order intermodulation generation circuit configured to generate and inject a second order intermodulation product into the input transformer. The injected second order intermodulation product can be used to cancel out unwanted third order intermodulation products generated by the amplifier, which reduces intermodulation distortion experienced by the amplifier circuitry.

A power amplifier system having a power amplifier stage with dynamic bias circuitry is disclosed. Also included is bias control circuitry having a compression sensor having a sensor input coupled to a RF signal output and a sensor output, wherein the compression sensor is configured to generate a gain deviation signal in response to a sensed deviation from a flat gain profile of the power amplifier stage. Further included is a bias driver that is configured to drive dynamic bias circuitry to adjust bias to the power amplifier stage to maintain the flat gain profile in response to the gain deviation signal.

A power amplifier system having a power amplifier stage with dynamic bias circuitry is disclosed. Also included is bias control circuitry having a compression sensor having a sensor input coupled to a RF signal output and a sensor output, wherein the compression sensor is configured to generate a gain deviation signal in response to a sensed deviation from a flat gain profile of the power amplifier stage. Further included is a bias driver that is configured to drive dynamic bias circuitry to adjust bias to the power amplifier stage to maintain the flat gain profile in response to the gain deviation signal.

A method of manufacturing a power amplifier package embedded with an input-output circuit including a dielectric circuit board, a heat sink and lead frames, the method comprising: the step of preparing the dielectric circuit board including the steps of forming a power amplifier hole in which a power amplifier chip is to be disposed on a dielectric substrate, printing an input matching network metal pattern on a left side of the power amplifier hole, and printing an output matching network metal pattern on a right side of the power amplifier hole, and sintering the input matching network metal pattern and the output matching network metal pattern printed on the dielectric substrate; the step of preparing the lead frames by etching alloy 42 and plating nickel; and the step of attaching the heat sink on a bottom surface of the dielectric circuit board.

A method of manufacturing a power amplifier package embedded with an input-output circuit including a dielectric circuit board, a heat sink and lead frames, the method comprising: the step of preparing the dielectric circuit board including the steps of forming a power amplifier hole in which a power amplifier chip is to be disposed on a dielectric substrate, printing an input matching network metal pattern on a left side of the power amplifier hole, and printing an output matching network metal pattern on a right side of the power amplifier hole, and sintering the input matching network metal pattern and the output matching network metal pattern printed on the dielectric substrate; the step of preparing the lead frames by etching alloy 42 and plating nickel; and the step of attaching the heat sink on a bottom surface of the dielectric circuit board.

Increasing an analog to digital converter (ADC) dynamic range for a communications device. In the communications device, a reference threshold is established for a peak to average power ratio (PAPR) improvement factor for RF signals received by the communications device. A digital to analog converter (DAC) adjustment factor is established for a DAC to account for inaccuracies of a pre-cancellation DAC and fine tuning of an analog gain of received RF signals. A peak amplitude separation element evaluates an absolute value of a portion of a particular RF signal against the reference threshold. Upon the peak amplitude separation element determining that the portion is smaller than the reference threshold, the element assigns a zero value to a DAC signal current sample; otherwise, the element assigns a quantized value of the sample to the DAC signal current sample, used in adjusting a post-cancellation signal sample.

Bias arrangements for amplifiers are disclosed. An example bias arrangement for an amplifier includes a bias circuit, configured to produce a bias signal for the amplifier; a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal produced by the bias circuit to produce a modified bias signal to be provided to the amplifier; and a coupling circuit, configured to couple the bias circuit and the linearization circuit. Providing separate bias and linearization circuits coupled to one another by a coupling circuit allows separating a linearization operation from a biasing loop to overcome some drawbacks of prior art bias arrangements that utilize a single biasing loop.

Thermal temperature sensors for power amplifiers are provided herein. In certain implementations, a semiconductor die includes a compound semiconductor substrate, and a power amplifier including a plurality of field-effect transistors (FETs) configured to amplify a radio frequency (RF) signal. The plurality of FETs are arranged on the compound semiconductor substrate as a transistor array. The semiconductor die further includes a semiconductor resistor configured to generate a signal indicative of a temperature of the transistor array. The semiconductor resistor is located adjacent to one end of the transistor array.