Patent classifications
H03F3/195
Architecture of a low bandwidth predistortion system for non-linear RF components
Systems and methods for compensating for non-linearity of a non-linear subsystem using predistortion are disclosed. In one embodiment, a system includes a non-linear subsystem and a predistorter configured to effect predistortion of an input signal of the non-linear subsystem such that the predistortion compensates for a non-linear characteristic of the non-linear subsystem. In addition, the system includes a narrowband filter that filters a feedback signal that is representative of an output signal of the non-linear subsystem to provide a filtered feedback signal, and an adaptor that adaptively configures the predistorter based on the filtered feedback signal and a reference signal that is representative of an input signal of the non-linear subsystem. By utilizing the filtered feedback signal, rather than the feedback signal, a complexity, and therefore, cost of the adaptor is substantially reduced.
High-frequency amplifier
According to one embodiment, a high-frequency amplifier includes an active element and an output matching circuit. The active element is provided on a substrate. The active element is configured to amplify a signal having a frequency band. The active element includes a cell region. The output matching circuit is connected to the active element. The output matching circuit includes a wire, a transmission line and an output terminal. The wire includes an input end and an output end. The input end of the wire is connected to an output part of the cell region of the active element. The transmission line is provided on the substrate. The transmission line includes an input part and an output part. The input part of the transmission line is connected to the output end of the wire. The output terminal is provided on the substrate.
High-frequency amplifier
According to one embodiment, a high-frequency amplifier includes an active element and an output matching circuit. The active element is provided on a substrate. The active element is configured to amplify a signal having a frequency band. The active element includes a cell region. The output matching circuit is connected to the active element. The output matching circuit includes a wire, a transmission line and an output terminal. The wire includes an input end and an output end. The input end of the wire is connected to an output part of the cell region of the active element. The transmission line is provided on the substrate. The transmission line includes an input part and an output part. The input part of the transmission line is connected to the output end of the wire. The output terminal is provided on the substrate.
Method and system for a pseudo-differential low-noise amplifier at Ku-band
Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor.
Method and system for a pseudo-differential low-noise amplifier at Ku-band
Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor.
Integrated circuit chip for receiver collecting signals from satellites
An integrated circuit chip includes a first single-ended-to-differential amplifier configured to generate a differential output associated with an input of said first single-ended-to-differential amplifier; a second single-ended-to-differential amplifier arranged in parallel with said first single-ended-to-differential amplifier; a first set of switch circuits arranged downstream of said first single-ended-to-differential amplifier; a second set of switch circuits arranged downstream of said second single-ended-to-differential amplifier; and a first differential-to-single-ended amplifier arranged downstream of a first one of said switch circuits in said first set and downstream of a first one of said switch circuits in said second set.
Integrated circuit chip for receiver collecting signals from satellites
An integrated circuit chip includes a first single-ended-to-differential amplifier configured to generate a differential output associated with an input of said first single-ended-to-differential amplifier; a second single-ended-to-differential amplifier arranged in parallel with said first single-ended-to-differential amplifier; a first set of switch circuits arranged downstream of said first single-ended-to-differential amplifier; a second set of switch circuits arranged downstream of said second single-ended-to-differential amplifier; and a first differential-to-single-ended amplifier arranged downstream of a first one of said switch circuits in said first set and downstream of a first one of said switch circuits in said second set.
Apparatus and method for gallium nitride (GaN) amplifiers
A wide bandgap voltage reference circuit generates a temperature stable negative bias reference voltage for use in wide bandgap circuits. The reference circuit uses field effect transistor (FET) based source feedback. It can also be used as source feedback in high power high bandgap device applications, where constant current is required over process and thermal variations.
Apparatus and method for gallium nitride (GaN) amplifiers
A wide bandgap voltage reference circuit generates a temperature stable negative bias reference voltage for use in wide bandgap circuits. The reference circuit uses field effect transistor (FET) based source feedback. It can also be used as source feedback in high power high bandgap device applications, where constant current is required over process and thermal variations.
POWER AMPLIFIER
A power amplifier includes: a transistor having a gate electrode, a source electrode and a drain electrode; a passive component part connected to the gate electrode through a gate wiring; and a harmonic circuit connected between the source electrode and the gate wiring and disposed in a region between the gate electrode and the passive component part and between the source electrode and the gate wiring.