Examples disclosed herein relate to a high gain active relay antenna system. The active relay antenna system comprises a first antenna pair having a first receive antenna and a first transmit antenna to communicate wireless signals in a forward link from a base station to a plurality of users; and a second antenna pair having a second receive antenna and a second transmit antenna to communicate wireless signals in a return link from the plurality of users to the base station. The active relay antenna system further comprises a first active relay section and a second active relay section to provide for adjustable power gain in the wireless signals.

A phase shifter capable of improving phase accuracy by a simple method is provided. The phase shifter includes a hybrid coupler circuit including inductors with mutual inductances, an amplifying circuit, an impedance matching circuit provided between the hybrid coupler circuit and the amplifying circuit. The impedance matching circuit includes a first resistance element connected to an output node of the hybrid coupler circuit, a capacitance element connected between the first resistance element and the ground line in series, another inductor connected in parallel with the first resistance element, and a second resistance element provided between the inductor and the ground line in series.

An apparatus has advanced amplifier Classes and low pass filter technologies for using software generated ascending or level waveforms that are effective when applying cardiac defibrillation and cardioversion waveforms which significantly reduce damage to the heart muscle. The apparatus comprises a waveform energy control system for delivering software generated waveforms comprising differentially driven Class D and Class B amplifier sections, wherein the Class D amplifier section produces Phase 1 ascending waveforms and has a programmable lowpass filter (LPF) and wherein the Class B amplifier section delivers hard-switched Phase 2 waveforms.

A concurrent-type multiband amplifier (or a dual-band amplifier) which amplifies multiband signals concurrently using a plurality of (N) amplifier circuits which each independently amplify signals in a plurality of (N) frequency bands. An n-th (n=any of 1 to N) amplifier circuit is provided with a circuit for blocking signals in frequency bands other than the n-th frequency band so as to amplify and output only the n-th frequency band signal. The n-th amplifier circuit is designed so as to consist of its input/output impedance matching circuit for the n-th an amplifier element at the n-th frequency band.

The present disclosure relates to digital up-conversion for a multi-band Multi-Order Power Amplifier (MOPA) that enables precise and accurate control of gain, phase, and delay of multi-band split signals input to the multi-band MOPA. In general, a multi-band MOPA is configured to amplify a multi-band signal that is split across a number, N, of inputs of the multi-band MOPA as a number, N, of multi-band split signals, where N is an order of the multi-band MOPA and is greater than or equal to 2. A digital upconversion system for the multi-band MOPA is configured to independently control a gain, phase, and delay for each of a number, M, of frequency bands of the multi-band signal for each of at least N1, and preferably all, of the multi-band split signals.

An amplifier apparatus (332) comprises a main linear amplifier sub-circuit (402) having a main driving signal input terminal (331) and a main amplifier output terminal (406). The apparatus also comprises an auxiliary linear amplifier sub-circuit (404) having an auxiliary driving signal input terminal (357) and an auxiliary amplifier output terminal (408). A combining network (410) is operably coupled between the main amplifier output terminal (406) and the auxiliary amplifier output terminal (408), the combining network (410) having a main-side terminal (424) and an auxiliary-side terminal (434). The main linear amplifier sub-circuit (402) is arranged to generate, when in use, a main amplified signal in response to a main driving signal applied at the main driving signal input terminal (331). The auxiliary linear amplifier sub-circuit (404) is arranged to generate, when in use, an impedance modifying signal at the auxiliary-side terminal (357) in response to an auxiliary driving signal and at substantially the same time as the main linear amplifier sub-circuit (402) generates the main amplified signal, the auxiliary linear amplifier sub-circuit (404) also being arranged to amplify substantially more than half of each wave cycle of the auxiliary driving signal.

An amplifier includes a semiconductor substrate. A first conductive feature partially covers the bottom substrate surface to define a conductor-less region of the bottom substrate surface. A first current conducting terminal of a transistor is electrically coupled to the first conductive feature. Second and third conductive features may be coupled to other regions of the bottom substrate surface. A first filter circuit includes an inductor formed over a portion of the top substrate surface that is directly opposite the conductor-less region. The first filter circuit may be electrically coupled between a second current conducting terminal of the transistor and the second conductive feature. A second filter circuit may be electrically coupled between a control terminal of the transistor and the third conductive feature. Conductive leads may be coupled to the second and third conductive features, or the second and third conductive features may be coupled to a printed circuit board.

A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, an emitter follower transistor that supplies a bias signal to the amplifier to control a bias point of the amplifier, and a current source that supplies a control current which changes in accordance with a change in control voltage to a collector of the emitter follower transistor. The current source limits the control current to not greater than an upper limit.

Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.

A single chip for generating multiple differential signals and loop-through signals according to a single-ended RF signal inputted to the single chip, wherein delays between different channels of the multiple differential signals and loop-through signals can be minimized for supporting picture-in-picture applications; in addition, the single chip can integrate a power detector and an AGC circuit for controlling the gain of an LNA inside the single chip, and the gain of the LNA can be outputted from the single chip for different usages.