Patent classifications
H03F3/211
BI-DIRECTIONAL BUFFER HAVING A LOW BIAS VOLTAGE AND A FAST TRANSIENT RESPONSE
A bi-directional buffer for applications using in an I2C or SMBUS or other bus systems. The bi-directional buffer has an input terminal to receive an input voltage signal and an output terminal for providing an output voltage signal, and the output voltage signal follows the input voltage signal. The output voltage signal is regulated to have a first bias voltage greater than the input voltage signal by a first operational amplifier, or to have a second bias voltage greater than the input voltage signal by a second operational amplifier, the second bias voltage is smaller than the first bias voltage.
HIGH-FREQUENCY AMPLIFIER
A high-frequency amplifier includes a driver amplifier configured to amplify an input high-frequency signal, a Doherty amplifier, including a carrier amplifier and a peak amplifier, and configured to further amplify a signal output from the driver amplifier, a first multilayer substrate, a second multilayer substrate laminated to overlap the first multilayer substrate, and a base member mounted with the first multilayer substrate and the second multilayer substrate, wherein the driver amplifier is mounted on the second multilayer substrate, the carrier amplifier and the peak amplifier are mounted on the first multilayer substrate, the driver amplifier, the carrier amplifier, and the peak amplifier have a front surface forming a predetermined circuit, and a back surface located on an opposite side from the front surface, respectively, the front surface of the driver amplifier opposes the first multilayer substrate, and the back surface of the driver amplifier is separated from the first multilayer substrate, the back surfaces of the carrier amplifier and the peak amplifier both make contact with the base member, respectively, and the back surface of the driver amplifier is connected to an interconnect layer disposed on a surface of the second multilayer substrate, the interconnect layer is connected to one end of a first via penetrating the second multilayer substrate and the first multilayer substrate, and the other end of the first via is connected to the base member.
Radio-frequency power generator and control method
A power generator includes a plurality of amplifier blocks and a combiner. Each of the amplifier blocks include one or more amplifiers, and the combiner combines modulated power signals output from the amplifier blocks to generate an RF power signal of a load. The amplifier blocks are controlled to outphase the modulated power signals based on a phase angle. Ones of the amplifier blocks may perform discrete modulation to generate a respective one of the modulated power signals. The discrete modulation includes selecting different combinations of the amplifiers in one or more of the amplifier blocks to change the RF power signal in discrete steps. In embodiments, the amplifiers may be radio frequency power amplifiers.
RADIO-FREQUENCY MODULE AND COMMUNICATION DEVICE
Improvement in heat dissipation capability is intended. A radio-frequency module includes a mounting substrate, a first transmission filter, a second transmission filter, a resin layer, and a shield layer. The second transmission filter is higher in power class than the first transmission filter. The resin layer covers at least part of an outer peripheral surface of the first transmission filter and covers at least part of an outer peripheral surface of the second transmission filter. The shield layer overlaps at least part of the second transmission filter in plan view in a thickness direction of the mounting substrate. At least part of a major surface of the second transmission filter on an opposite side to the mounting substrate side is in contact with the shield layer.
POWER AMPLIFIER HAVING IMPROVED GATE OXIDE INTEGRITY
Power amplifiers having improved gate oxide integrity are disclosed. In particular, a dynamic asymmetric cascode bias circuit is used to provide a bias signal to a cascode power amplifier stage. The bias signal swings in synchronicity with an output signal from the power amplifier stage. By having this dynamic bias signal, the gate-drain stress on the device is reduced, preserving gate oxide integrity. Preserving gate oxide integrity helps preserve the operational profile and extend device life, providing an enhanced user experience.
ELECTRONIC DEVICE INCLUDING A PLURALITY OF POWER AMPLIFIERS AND OPERATING METHOD THEREOF
Various embodiments of the disclosure relate to a device and a method for supplying power to a plurality of power amplifiers in an electronic device. An electronic device may include: a first power amplifier, a second power amplifier, a third power amplifier, a first power supply module including a power supply configured to supply power to the first power amplifier or the second power amplifier, a second power supply module including a power supply configured to supply power to the second power amplifier or the third power amplifier, and a detection module comprising circuitry configured to identify a state of a connection between the second power amplifier and the first power supply module and a state of a connection between the second power amplifier and the second power supply module, wherein the detection module may be configured to output a power control signal based on detecting that the second power amplifier is connected to the first power supply module and the second power supply module, wherein power supply to the second power amplifier from the first power supply module or the second power supply module may be shut off based on the power control signal of the detection module.
METHOD AND CIRCUIT TO ISOLATE BODY CAPACITANCE IN SEMICONDUCTOR DEVICES
Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
Power amplifier module
A power amplifier module includes first and second amplifiers, a first bias circuit, and an adjusting circuit. The first amplifier amplifies a first signal. The second amplifier amplifies a second signal based on an output signal from the first amplifier. The first bias circuit supplies a bias current to the first amplifier via a current path on the basis of a bias drive signal. The adjusting circuit includes an adjusting transistor having first, second, and third terminals. A first voltage based on a power supply voltage is supplied to the first terminal. A second voltage based on the bias drive signal is supplied to the second terminal. The third terminal is connected to the current path. The adjusting circuit adjusts the bias current on the basis of the power supply voltage supplied to the first amplifier.
Radio frequency module and communication device
A radio frequency module includes: a module board that includes a first principal surface and a second principal surface on opposite sides of the module board; a power amplifier configured to amplify a transmission signal; a first circuit component; and a power amplifier (PA) control circuit configured to control the power amplifier. The power amplifier and the PA control circuit are stacked on the first principal surface, and the first circuit component is disposed on the second principal surface.
Active biconical antenna and receive array
An active biconical antenna and a receive array comprising a combination of active biconical and Vivaldi antennas. In one configuration, the active biconical antenna includes upper and lower cones. Each cone has a respective truncated apex. First and second feed points are respectively connected to the truncated apexes of the upper and lower cones and to first and second conductors. The active biconical antenna further includes a buffer amplifier having respective input terminals connected to the first and second conductors. The buffer amplifier has an input impedance that is impedance matched to an antenna impedance at and above but not below a frequency f.sub.c and is higher than the antenna impedance at frequencies substantially less than f.sub.c. The buffer amplifier also has an output impedance that is impedance matched to a system impedance at frequencies both above and below f.sub.c. A length of the first and second conductors is less than a wavelength at the frequency f.sub.c.