Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.

A feedforward amplifier comprises a power amplifier that generates an amplified signal, an error correcting circuitry that generates a first error signal and a second error signal based on an error in the amplified signal; and an output circuitry. The output circuitry comprises: a first quadrature coupler, an output of a first error amplifier is connected to the quadrature coupler and an input of the first error amplifier is configured to receive the first error signal, and an output of a second error amplifier is connected to the quadrature coupler and an input of the second error amplifier is configured to receive the second error signal. The output circuitry generates an error compensation signal in the first quadrature coupler from the output signals of the first and second error amplifiers.

A power amplifying circuit includes multi-stage power amplifiers, bias circuits, and a control circuit. The bias circuits output corresponding bias currents based on corresponding control currents. The control circuit outputs the control currents to the bias circuits based on a control voltage. The power amplifiers include a first stage of first and second power amplifiers connected in parallel electrically. The bias circuits include first and second bias circuits. The control circuit includes first and second current output units. The first current output unit outputs, to the first bias circuit, a first control current which has a first current value when the control voltage is a first threshold voltage, and which increases linearly with the control voltage, and the second current output unit outputs, to the second bias circuit, a second control current, having a second constant current value, when the control voltage is the first threshold voltage or greater.

An envelope tracking (ET) radio frequency (RF) front-end circuit is provided. The ET RF front-end circuit includes an ET integrated circuit(s) (ETIC(s)), a local transceiver circuit, a target voltage circuit(s), and a number of power amplifiers. The local transceiver circuit receives an input signal(s) from a coupled baseband transceiver and generates a number of RF signals. The target voltage circuit(s) generates a time-variant ET target voltage(s) based on the input signal(s). The ETIC(s) generates multiple ET voltages based on the time-variant ET target voltage(s). The power amplifiers amplify the RF signals based on the ET voltages. Given that the time-variant ET target voltage(s) is generated inside the self-contained ET RF front-end circuit, it is possible to reduce distortion in the time-variant ET target voltage(s), thus helping to improve operating efficiency of the power amplifiers, especially when the RF signals are modulated with a higher modulation bandwidth (e.g., ≥200 MHz).

An electrical system includes a power supply and an electrical circuit coupled to the power supply and including an operational amplifier. The operational amplifier includes an input stage and a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal. The operational amplifier also includes an output stage with bipolar transistors coupled to the pre-driver stage. The pre-driver stage is configured to: detect a voltage differential across the first and second input terminals of the pre-driver stage; and provide an adjustable bias current based on the voltage differential.

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

An active biconical antenna and a receive array comprising a combination of active biconical and Vivaldi antennas. In one configuration, the active biconical antenna includes upper and lower cones. Each cone has a respective truncated apex. First and second feed points are respectively connected to the truncated apexes of the upper and lower cones and to first and second conductors. The active biconical antenna further includes a buffer amplifier having respective input terminals connected to the first and second conductors. The buffer amplifier has an input impedance that is impedance matched to an antenna impedance at and above but not below a frequency f.sub.c and is higher than the antenna impedance at frequencies substantially less than f.sub.c. The buffer amplifier also has an output impedance that is impedance matched to a system impedance at frequencies both above and below f.sub.c. A length of the first and second conductors is less than a wavelength at the frequency f.sub.c.

A high frequency device includes a semiconductor chip including a semiconductor substrate, and an amplifier provided on a front surface of the semiconductor substrate and amplifying a high frequency signal, a first reference potential layer provided above the semiconductor chip in an upper direction perpendicular to the front surface of the semiconductor substrate, and provided so as to overlap with the semiconductor chip in a plan view from above, and to which a reference potential is supplied, and a resonator provided between the semiconductor chip and the first reference potential layer in the upper direction perpendicular to the front surface of the semiconductor substrate, wherein a resonance frequency of the resonator is included in an operating frequency band of the amplifier, and an impedance of the resonator becomes minimal at the resonance frequency.

Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.

A symbol-power-tracking (SPT) voltage supply to power a radio-frequency power amplifier (RF PA) is shown. A power converter is coupled to an output port of an input power source for power conversion, and has an output terminal coupled to a power terminal of the RF PA. A transition capacitor is coupled to the power terminal of the radio-frequency power amplifier through the output terminal of the power converter. An assisted charging and discharging circuit is coupled to the transition capacitor during cyclic prefix (CP) sections. A multi-level array is provided which includes a plurality of voltage-regulated capacitors pre-charged to and kept at different voltage levels. During each symbol section, a target capacitor at a fixed voltage level matching the current SPT situation is selected from among the voltage-regulated capacitors to be coupled to the power terminal of the radio-frequency power amplifier.