Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.

A first amplifier circuit in a preceding stage, a second amplifier circuit in a subsequent stage, and a ground external connection terminal are disposed on a substrate. The first and second amplifier circuits each include bipolar transistors, capacitive elements for the respective bipolar transistors, and resistive elements for the respective bipolar transistors. The bipolar transistors each include separate base electrodes, that is, a first base electrode for radio frequency and a second base electrode for biasing. The bipolar transistors of the second amplifier circuit include emitter electrodes connected to the ground external connection terminal. The minimum spacing between the first base electrode and an emitter mesa layer of at least one of the bipolar transistors of the second amplifier circuit is greater than the minimum spacing between the first base electrode and am emitter mesa layer of each of the bipolar transistors of the first amplifier circuit.

An amplifier device, such as a Doherty amplifier device, may include an extra lead and decoupling capacitor coupled to radio frequency (RF) cold points of output impedance matching circuitry of multiple amplification paths, such as a carrier path and peaking path, of the amplifier device. The extra lead and the decoupling capacitor are configured to provide low frequency resonance decoupling for the multiple amplification paths. A drain bias voltage may be provided to the drain terminals of transistors of amplifiers of the amplifier device via the extra lead. An integrated passive device (IPD) including a wire fence and one or more conductive pads may be disposed between a carrier amplifier die and a peaking amplifier. The extra lead may be coupled to the RF cold points via the IPD. The wire fence may mitigate RF interference between the carrier amplifier die and the peaking amplifier die.

Apparatus and methods for oscillation suppression of cascode power amplifiers are provided herein. In certain implementations, a power amplifier system includes a cascode power amplifier including a plurality of transconductance devices that operate in combination with a plurality of cascode devices to amplify a radio frequency input signal. The power amplifier system further includes a bias circuit that biases the plurality of cascode devices with two or more bias voltages that are decoupled from one another at radio frequency to thereby inhibit the cascode power amplifier from oscillating.

A measurement system includes a gain chain configured to amplify an analog input signal; a range selector configured to select a gain between the analog input signal and a plurality of analog-to-digital converter (ADC) outputs from a plurality of ADCs, wherein each ADC output has a path, and a gain of each output path is made up of a plurality of gain stages in the gain chain; and a mixer configured to combine the plurality of ADC outputs into a single mixed output.

A high frequency amplifier includes an asymmetrical Doherty amplifier having a carrier amplifier, a peak amplifier, a branch circuit, and a phase adjusting circuit, a driver amplifier, and a base member mounting a first circuit board mounting the driver amplifier, the carrier amplifier, and the peak amplifier and a second circuit board mounting the circuits. The branch circuit divides a path of a RF signal into input paths of the peak and carrier amplifiers. The driver amplifier, the carrier amplifier, and the peak amplifier have rear surfaces in contact with the base member. The electrical length from the output terminal of the driver amplifier to the input terminal of the peak amplifier, when converted based on a phase of the signal, is from (2n+1)????/4 to (2n+1)??+?/4, where n is an integer greater than or equal to zero.

The present invention concerns a linear amplifier for providing a sinusoidal waveform to a load, characterized in that the linear amplifier is composed of an asymmetric amplifier and a H-bridge module, the asymmetric amplifier comprises at least one transistor that amplifies a full wave rectified sinus signal that is transformed by the H bridge module into a sinewave signal that is provided to the load.

There is provided a RF-DAC that may include (i) a first PAM that includes a first group of first power amplifiers of different amplifications, (ii) a second PAM that includes a second group of second power amplifiers of different amplifications; (iii) a load that includes an output port and a transformer; (iv) power amplifiers control units, and a transformer control unit. During a cycle of operation (i) each one of the first and second PAMs is configured to receive one or more power amplifiers digital control signals and activate a single power amplifier per each of the first and second PAMS, (ii) the transformer control unit is configured to receive a transformer digital control signal and control a transformer parameter of the transformer, and (iii) the transformer is configured to receive a first PAM output signal and a second PAM output signal, and output a transformer output signal that reflects digital information represented by the one or more power amplifiers digital control signals and the transformer digital control signal.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

Aspects of this disclosure relate to a receiver for a light detection and ranging system. The receiver includes a transimpedance amplifier that is operable in a linear mode for a range of power of light received by the receiver. The receiver can provide information about amplitude of the light outside of the range of power of the light for which the transimpedance amplifier operates in the linear mode. This information can be useful, for example, in identifying an object from which light received by the receiver was reflected.