An amplification circuit includes a first group of amplifiers including N first amplifiers, a first terminal coupled to each output of the N first amplifiers, and a second group of amplifiers including N second amplifiers. Each of the N first amplifiers and each of the N second amplifiers includes an output. The second group of amplifiers is divided into a first subassembly of amplifiers and a second subassembly of amplifiers. The first subassembly includes M second amplifiers of the second group and the second subassembly includes NM remaining second amplifiers of the second group. The amplification circuit further includes a second terminal and a third terminal. The second terminal is coupled to each output of the M second amplifiers and the third terminal is coupled to each output of the NM second remaining amplifiers.

A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. A output passive network can further generate a flat-phase response between dual resonances of operation.

An e-band transceiver includes a transmitter circuit and a receiver circuit. The transmitter circuit includes a surface mounted technology (SMT) module on which is mounted a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier. The receiver circuit of the e-band transceiver includes a receiver-side SMT module on which is mounted a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

Methods of calibrating a power amplifier system to compensate for envelope amplitude misalignment are provided. In certain configurations, a method of calibrating a power amplifier system includes amplifying a radio frequency signal from a transceiver using a power amplifier and generating a supply voltage of the power amplifier using an envelope tracker, including generating a scaled envelope signal based on a power control level signal and an envelope signal, and shaping the scaled envelope signal using a shaping table generated at a target gain compression. The method further includes changing a scaling of the scaled envelope signal using a calibration module, monitoring an output of the power amplifier to determine an amount of scaling of the scaled envelope signal at which a detected gain compression of the power amplifier corresponds to the target gain compression of the shaping table, and calibrating the power amplifier system based on the determination.

A power amplifier includes a signal input unit to which an input signal is applied, an output stage that is electrically isolated from the signal input unit, where the output stage is configured to amplify an output signal of the signal input unit based on a power supply voltage from a floating power supply, a reference potential switch that is inserted between a reference node of the power supply voltage generated by the floating power supply and a reference potential line, and a feedback circuit configured to amplify a differential voltage between an output node of the output stage and the reference node, and feed the resultant voltage back to the signal input unit.

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

A buffer amplifier configured to perform voltage switching (DC bias voltage switching). The buffer amplifier includes first and second amplification blocks corresponding to first and second channels, respectively, first and second output buffer units controlled by output levels of the first and second amplification blocks, and a switch unit configured to connect or disconnect the first or second amplification block to or from the first or second output buffer unit. The switch unit includes a first switch unit configured to connect or disconnect one of the first and second amplification blocks to or from the first output buffer unit based on or in response to a control signal and a second switch unit configured to connect or disconnect another one of the first and second amplification blocks to or from the second output buffer unit based on or in response to the control signal.

Radio-frequency (RF) amplifier having active gain bypass circuit. In some embodiments, an amplifier can include a first amplification path implemented to amplify a signal, and having a cascode arrangement of a first input transistor and a cascode transistor to provide a first gain for the signal when in a first mode. The amplifier can further include a second amplification path implemented to provide a second gain for the signal while bypassing at least a portion of the first amplification path when in a second mode. The second amplification path can include a cascode arrangement of a second input transistor and the cascode transistor shared with the first amplification path. The amplifier can further include a switch configured to allow routing of the signal through the first amplification path in the first mode or the second amplification path in the second mode.

A method for calibrating a radiofrequency multichannel subsystem of a telecommunications payload includes a step of generating and injecting a calibration signal at one or more input access channel injection points; a step of tapping off the injected and propagated calibration signal at tapping-off points of an access channel at output; and then a step of estimating the amplitude and/or phase differences between the internal channels of the multichannel subsystem on the basis of the calibration signal injected at input, serving as a reference, and of the extracted calibration signal or signals; and then a step of correcting the amplitude and/or phase differences by way of correction means. The injected calibration signal is a chirp signal, formed of a chirp or of a sequence of at least two identical chirps. A calibration system implements the calibration method.