LNA circuitry includes an input node, and output node, a primary amplifier stage, a first ancillary amplifier stage, and an input gain selection switch. The primary amplifier stage is configured to provide a first gain response between a primary amplifier stage input node and a primary amplifier stage output node, wherein the primary amplifier stage input node is coupled to the input node and the primary amplifier stage output node is coupled to the output node. The first ancillary amplifier stage is configured to provide a second gain response between a first ancillary amplifier stage input node and a first ancillary amplifier stage output node, wherein the first ancillary amplifier stage output node is coupled to the primary amplifier stage output node. The input gain selection switch is coupled between the input node and the first ancillary amplifier stage input node.

The eddy current flaw detection apparatus includes: a pair of detecting coils 10a, 10b arranged in coaxial and spaced relation with a specimen 3; and a bridge circuit two sides of which are constituted by the detecting coils so that magnetic fields generated by these detecting coils 10a, 10b are in opposite phases to each other. A pair of exciting coils 11a, 11b are arranged coaxially with the detecting coils 10a, 10b in a manner to sandwich the pair of detecting coils 10a, 10b therebetween. A distance D between the detecting coil and the exciting coil adjacent thereto is set to a distance where a vibrational noise signal excited in the exciting coil and detected by its adjacent detecting coil is in opposite phase to that of a vibrational noise signal excited in the detecting coil and detected by the detecting coil.

RF transistor amplifiers are provided that include a submount and an RF transistor amplifier die that is mounted on top of the submount. A multi-layer encapsulation is formed that at least partially covers the RF transistor amplifier die. The multi-layer encapsulation includes a first dielectric layer and a first conductive layer, where the first dielectric layer is between a top surface of the RF transistor amplifier die and the first conductive layer.

A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.

A low noise amplifier includes a first input transistor coupled to an input signal and a second input transistor coupled to the input signal. The low noise amplifier also includes a first output transistor, coupled between the first input transistor and a first carrier aggregation load, configured to connect the first input transistor to the first carrier aggregation load. Additionally, the low noise amplifier includes a second output transistor, coupled between the first input transistor and a second carrier aggregation load, configured to connect the first input transistor to the second carrier aggregation load. Further, the low noise amplifier includes a third output transistor, coupled between the second input transistor and the second carrier aggregation load, configured to connect the second input transistor to the second carrier aggregation load. Also included are a method of operating a low noise amplifier and an extended carrier low noise amplifier.

A power amplifier including a power amplifier stage. The power amplifier stage may be configured to receive a signal, amplify the signal at saturation with substantially zero amplitude-phase (AM-PM) distortion, and output the amplified signal as an output signal. The power amplifier may be a single stage power amplifier or a multi-stage power amplifier.

An active electronically scanned array (AESA) includes a plurality of power amplifiers including first power amplifiers and second power amplifiers. The first power amplifiers are biased by a first drain voltage. The second power amplifiers are biased by a second drain voltage. The second drain voltage is different from the first drain voltage.

A broadband power amplifier device includes an input matching network including first, second and third inductors, a driver amplifier, and first, second and third frequency modulators. First inductor has one end connected to output of a mixer and the other end connected to one end of the first frequency modulator, with the other end of the first frequency modulator being grounded. The second inductor has one end connected to one end of first inductor and the other end connected to input of driver amplifier, with second frequency modulator being connected across second inductor. Third inductor has one end connected to output of driver amplifier and the other end connected to input of power amplifier, with third frequency modulator being connected across third inductor. Bandwidth of power amplifier device can be extended and area and current consumption thereof can be reduced, while power can be improved without large LO driver.

An output signal can be free of any noise component generated from an amplifier disposed in a path, without degradation of the S/N ratio of the output signal. An amplifier includes: a first amplifier that is connected to an input node and generates a first intermediate signal; a feedback resistor that enables feedback of the first intermediate signal to the input node; an attenuator that receives the first intermediate signal and generates a second intermediate signal; a second amplifier that is connected to the input node and generates a third intermediate signal; a third amplifier that is connected to the input node and generates a fourth intermediate signal; and an adder that generates an output signal, using the second intermediate signal, the third intermediate signal, and the fourth intermediate signal.

A distributed active transformer includes an input transformer set and an output transformer set. Active stages are coupled between a transformer in the input transformer set and a transformer in the output transformer set. The input and output transformer sets are each configured as a slab transformer. The input slab transformer includes a single primary slab and many secondary slabs. The output slab transformer includes many primary slabs and a single secondary slab.