An improved method of providing high burst power to audio amplifiers from limited power sources, using parallel power paths to increase system efficiency without need for a power path controller, thus utilizing a simplified circuit operation and maximizing average power available for both the amplifier and supporting circuitry.

A signal amplifier device is provided to ensure the continuity of the gain of an amplifier. The signal amplifier device includes a main path and a sub path connected in parallel to the main path. A main path first amplifier circuit amplifies an input signal on the main path. A main path second amplifier circuit includes a common-gate transistor connected in series with an output of the main path first amplifier circuit without sharing a DC current. On the main sub path, the sub path amplifier circuit amplifies the input signal by using a gain lower than the maximum gain in the main path.

Provided are an input matching circuit, at least one amplifying transistor that receives a signal from the input matching circuit, a first dummy transistor that receives a signal from the input matching circuit, a second dummy transistor that receives a signal from the input matching circuit, and an output matching circuit that outputs an output of the amplifying transistor, the amplifying transistor being arranged between the first dummy transistor and the second dummy transistor, the amplifying transistor, the first dummy transistor, and the second dummy transistor being provided in a row along the input matching circuit.

A digital radio-frequency (RF) circuitry is disclosed. In one aspect, the circuitry includes a digitally controlled amplifier configured to receive an RF input signal and a digital control signal, and to output an amplitude controlled output signal. The digitally controlled amplifier includes one or more common-source amplifying unit cells. A respective common-source amplifying unit cell includes a sources node connected to a switching circuitry controllable by the digital control signal so as to activate or deactivate the common-source amplifying unit cell. The switching circuitry comprises a first switch configured to connect the source node with a first power supply node and a second switch configured to connect the source node with a second power supply node when activating and deactivating, respectively, the common-source amplifying unit cell.

Doherty power amplifier (PA) devices (e.g., packages and modules) including integrated output combining networks are disclosed. In embodiments, the Doherty PA device includes a first amplifier die having a first transistor with a first output terminal at which a first amplified signal is generated, a second amplifier die having a second transistor with a second output terminal at which a second amplified signal is generated, and an output combining network. The output combining network includes, in turn, a combining node integrally formed with the second amplifier die and electrically coupled to the second output terminal. At least one die-to-die bond wire electrically couples the first output terminal to the combining node. The at least one die-to-die bond wire has an electrical length, which is results in a 90 degree phase shift imparted to the first amplified signal between the first output terminal and the combining node.

Aspects of this disclosure relate to a receiver for a light detection and ranging system. The receiver includes a transimpedance amplifier that is operable in a linear mode for a range of power of light received by the receiver. The receiver can provide information about amplitude of the light outside of the range of power of the light for which the transimpedance amplifier operates in the linear mode. This information can be useful, for example, in identifying an object from which light received by the receiver was reflected.

The embodiments described herein can provide radio frequency (RF) amplifiers, and particularly Doherty power amplifiers. The Doherty amplifiers include a carrier amplifier, at least one peaking amplifier, and a combiner. In general, these Doherty amplifiers include an adaptive impedance transformation that provides a phase shift and modifies the impedance presented to one or more peaking amplifier(s) in the Doherty amplifier. Specifically, the combiner includes at least a first impedance transformer, second impedance transformer, and a third impedance transformer coupled between the first impedance transformer and the second impedance transformer. In accordance with the embodiments described herein, the third impedance transformer is configured to both provide both a phase shift and an impedance transformation.

Antenna impedance prediction via power amplifier parameter. In some embodiments, a power amplification system can include a splitter circuit and a combiner circuit, and first and second Doherty power amplifiers implemented in a quadrature configuration between the splitter circuit and the combiner circuit, with each Doherty power amplifier including a carrier amplifier and a peaking amplifier. The power amplification system can further include a monitoring circuit configured to measure at least some of base currents associated with the carrier and peaking amplifiers of the first and second Doherty power amplifiers, and generate a signal capable of adjusting a load impedance presented to an output of the combiner circuit.

A quadrature clock generator is disclosed. The quadrature clock generator may include a first injection-locked oscillator, a phase interpolator, and a second injection-locked oscillator. The first injection-locked oscillator may generate a first plurality clock signals from a first reference clock signal. The phase interpolator may generate a second reference clock signal from the first plurality of clock signals, and the second injection-locked oscillator may generate a second plurality of clock signals from the second reference clock signal. A first quadrature clock signal may be selected from the first plurality of clock signals and a second quadrature clock signal may be selected from the second plurality of reference clock signals.

A multimode envelope tracking (ET) circuit and related apparatus is provided. The multimode ET circuit is configured to provide an ET voltage(s) to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) that may correspond to a wider range of modulation bandwidth. In this regard, the multimode ET circuit is configured to switch dynamically and opportunistically between different operation modes based on the modulation bandwidth of the RF signal(s). In examples discussed herein, the multimode ET circuit is configured to support a single amplifier circuit in a high-modulation-bandwidth mode and an additional amplifier circuit(s) in a mid-modulation-bandwidth mode and a low-modulation-bandwidth mode. By switching dynamically and opportunistically between different operation modes, it may be possible to reduce undesired series resonance that may cause distortion in the ET voltage(s), thus helping to improve efficiency and performance of the amplifier circuit(s) supported by the multimode ET circuit.