An amplifier arrangement for amplifying an input signal to an output signal for delivering to a load is disclosed. The amplifier arrangement comprises a power splitter configured to receive the input signal and produce split input signals. The amplifier arrangement further comprises a first amplifier branch comprising multiple main amplifier circuits. Output signals of the multiple main amplifier circuits are combined to generate a first output signal. The amplifier arrangement further comprises a second amplifier branch comprising at least one auxiliary amplifier circuit. The at least one auxiliary amplifier circuit is configured to receive a split input signal from the power splitter and produce a second output signal. The amplifier arrangement further comprises a power combiner configured to receive the first and second output signals and produce the output signal for delivering to the load.

Diversity receiver front end systems with fixed impedance matching circuits to improve signal processing. The fixed impedance matching circuits can be configured to reduce out-of-band metrics such as noise figure and/or gain for a plurality of out-of-band frequency bands while reducing or not increasing above a certain threshold an in-band metric for the associated in-band frequency band. Each of a plurality of paths through the front-end systems can include fixed impedance matching circuits that accomplish this tuning to improve performance for the front-end systems.

Apparatus and methods for power amplifiers with positive envelope feedback are provided herein. In certain implementations, a power amplifier system includes a power amplification stage that amplifies a radio frequency signal, at least one envelope detector that generates one or more detection signals indicating an output signal envelope of the power amplification stage, and a wideband feedback circuit that provides positive envelope feedback to a bias of the power amplification stage based on the one or more detection signals. The power amplifier system further includes a supply modulator that controls a voltage level of a supply voltage of the power amplification stage based on the one or more detection signals such that the supply voltage is modulated with the output signal envelope through positive envelope feedback.

A power amplifier circuit amplifies a radio-frequency signal in a transmit frequency band. The power amplifier circuit includes an amplifier, a bias circuit, and an impedance circuit. The amplifier amplifies power of a radio-frequency signal and outputs an amplified signal. The impedance circuit is connected between a signal input terminal of the amplifier and a bias-current output terminal of the bias circuit and has frequency characteristics in which attenuation is obtained in the transmit frequency band. The impedance circuit includes first and second impedance circuits. The first impedance circuit is connected to the signal input terminal. The second impedance circuit is connected between the first impedance circuit and the bias-current output terminal.

Circuits, devices and methods related to amplification with active gain bypass. In some embodiments, an amplifier can include a first amplification path implemented to amplify a signal, and having a cascode arrangement of a first input transistor and a cascode transistor to provide a first gain for the signal when in a first mode. The amplifier can further include a second amplification path implemented to provide a second gain for the signal while bypassing at least a portion of the first amplification path when in a second mode. The second amplification path can include a cascode arrangement of a second input transistor and the cascode transistor shared with the first amplification path. The amplifier can further include a switch configured to allow routing of the signal through the first amplification path in the first mode or the second amplification path in the second mode.

An amplifier circuit (1) includes a FET (10) having a source terminal (S1), a drain terminal (D1), and a gate terminal (G1), a FET (20) having a source terminal (S2), a drain terminal (D2), and a gate terminal (G2) and coupled in parallel with the FET (10), a FET (30) having a source terminal (S3) coupled to the drain terminals (D1 and D2), a drain terminal (D3), and a gate terminal (G3) and cascoded with the FETs (10 and 20), and feedback circuits (21 and 22) configured to feed back to the gate terminal (G2) a high frequency signal outputted from the source terminal (S2) or the drain terminal (D2).

An improved method of providing high burst power to audio amplifiers from limited power sources, using parallel power paths to increase system efficiency without need for a power path controller, thus utilizing a simplified circuit operation and maximizing average power available for both the amplifier and supporting circuitry.

An impedance control unit is disclosed. Also disclosed are a balun unit, an electronic device, and a Doherty amplifier, each comprising the impedance control unit. The impedance control unit comprises a pair of re-entrant type coupled lines, and further comprises an electrical short between the intermediate plane and the ground plane arranged locally inside the pair of coupled lines.

An amplifier for a transceiver comprising

plurality of power amplifiers arranged on a base, each power amplifier comprising a power amplifier input port and a power amplifier output port;

a planar power splitter arranged on the base, the power splitter comprising a power splitter input port and a plurality of power splitter output ports;

each power amplifier input port being connected to a power splitter output port by a planar transmission line;

each power amplifier output port being connected to a waveguide transition;

a plurality of waveguides each defined by a waveguide wall, each waveguide being arranged within the base, each waveguide transition being connected to waveguide; and,

a waveguide power combiner arranged within the base, each waveguide being connected to the waveguide power combiner.

Methods and apparatus for implementing a power efficient amplifier device through the use of a main (primary) and auxiliary (secondary) power amplifier are described. The primary and secondary amplifiers operate as current sources providing current to the load. Capacitance coupling is used to couple the primary and secondary amplifier outputs. In some embodiments the combination of primary and secondary amplifiers achieve high average efficiency over the operating range of the device in which the primary and secondary amplifiers are used in combination as an amplifier device. The amplifier device is well suited for implementation using CMOS technology, e.g., N-MOSFETs, and can be implemented in an integrated circuit space efficient manner that is well suited for supporting RF transmissions in the GHz frequency range, e.g., 30 GHz frequency range. The primary amplifier in some embodiments is a CLASS-AB or B amplifier and the secondary amplifier is a CLASS-C amplifier.