Various transimpedance amplifier (TIA) arrangements for ultrasonic front-end receivers used in ultrasonic sensing applications are disclosed. An example TIA includes three common-source gain stages in a feedback loop with a common-gate stage. In some aspects, the TIA may include a level shifter configured to maintain the voltage at the gate of a transistor used to implement the first common-source gain stage of the feedback loop shifted by a certain amount with respect to the voltage at an input port to the TIA. In some aspects, at least portions of the TIA may be biased using bias currents that are configured to be process-, supply voltage-, and/or temperature-dependent. Various embodiments of the TIAs disclosed herein may benefit from one or more of the following advantages: reduced noise, reduced input impedance, reduced temperature coefficient of input impedance, and stability for a wide range of sensor frequencies.

A packaged semiconductor chip includes a power amplifier die including a semiconductor substrate, and an input contact pad, an output contact pad, first and second direct-current (DC) contact pads, one or more transistors having an input coupled to the input contact pad, and an input bias coupling path electrically coupling the first DC contact pad to the second DC contact pad and the input contact pad implemented on the semiconductor substrate. The chip further includes a lead frame having one or more radio-frequency input pins electrically coupled to the input contact pad, one or more radio-frequency output pins electrically coupled to the output contact pad, and first and second input bias pins electrically coupled to the first and second DC contact pads, respectively.

A temperature correction circuit and method for maintaining a transistor of a power amplifier in a linear operating region of the transistor. The temperature correction circuit includes a first current source circuit operable to provide a first correction current proportional to an absolute temperature of a semiconductor die including the transistor. The temperature correction circuit also includes a second current source circuit operable to provide a second correction current proportional to a change in temperature of a part of the semiconductor die in which the transistor is located during operation of the transistor. The temperature correction circuit further includes a third current source circuit operable to provide a gain selection current. The temperature correction circuit also includes circuitry for producing a reference current from the first and second correction currents and the gain current. The temperature correction circuit further includes an output for providing the reference current to the transistor.

The inventive concept relates to a communication device comprising a DPD processor configured to output a plurality of pre-distorted signals by pre-distorting each of a plurality of input signals using an extracted feedback signal, a first signal combiner configured to combine a plurality of feedback signals corresponding to the plurality of pre-distorted signals and output a combined feedback signal, an analog-to-digital converter configured to convert the combined feedback signal into a digital signal and output a digital-converted combined feedback signal and a signal extractor configured to extract the digital-converted combined feedback signal and output the extracted feedback signal.

An envelope tracking supply modulator includes an amplifier circuit and a zero peaking circuit. The amplifier circuit receives an envelope input, generates a modulated supply voltage according to the envelope input, and provides the modulated supply voltage to a power amplifier. The zero peaking circuit is coupled to the amplifier circuit, and applies zero peaking to the amplifier circuit, where the zero peaking inserts a zero at a frequency.

A single-wire peer-to-peer (P2P) bus apparatus is provided. The single-wire P2P bus apparatus includes a first peer device and a second peer device(s) coupled to a single-wire bus that correspond to a first bus access priority and a second bus access priority(s), respectively. Any of the first peer device and the second peer device(s) can contend for access to the single-wire bus by asserting a bus contention indication(s) when the single-wire bus is in a defined bus state. A winner for the single-wire bus may be a peer device having a highest bus access priority among those peer devices asserting the bus contention indication(s). In this regard, any peer device on the single-wire bus can have a chance to initiate communications over the single-wire bus, thus making it possible for the single-wire bus to function based on bidirectional P2P bus architecture capable of supporting more application and/or deployment scenarios.

An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (ETIC) and a distributed ETIC (DETIC) coupled to a single-wire bus that correspond to a first bus access priority and a second bus access priority, respectively. The ETIC and the DETIC can contend for access to the single-wire bus by asserting a bus contention indication(s) when the single-wire bus is in a defined bus state configured to permit bus contention. In a non-limiting example, a winner for the single-wire bus is a peer device having a highest bus access priority between the ETIC and the DETIC. In this regard, each of the ETIC and the DETIC can have a chance to initiate communications over the single-wire bus, thus making it possible for the single-wire bus to function based on bidirectional peer-to-peer (P2P) bus architecture capable of supporting more application and/or deployment scenarios.

An amplification apparatus includes: at least one voltage converter for converting a voltage of supplied power which is supplied from an external power supply source to the amplification apparatus, to a lower voltage; and at least one amplifier unit operable by supplied power which has the lower voltage as converted by the at least one voltage converter, for amplifying a radio frequency signal.

A display driver includes an operational amplifier, a D/A conversion circuit, a resistance circuit, and a resistance element. The D/A conversion circuit includes first and second variable resistance circuits including one end to which first and second voltages are input and another end connected to an inverting input node. The resistance circuit is provided between the inverting input node and an output node. The resistor is provided between the output node and the inverting input node. A resistance value of the first variable resistance circuit is set based on upper bit data of display data. A resistance value of the second variable resistance circuit is set based on lower bit data of the display data.

Systems and methods for measurement of signal power, when the signal is substantially variable or otherwise time varying. A log-linear VGA is coupled in a feedback configuration to a difference-of-squares detector and an integrator. The log-linear VGA includes a set of selectable amplifier cells. A sliding current generator selects one or more amplifier cells, wholly or partially, producing a sum of outputs. Some of the selectable amplifier cells have differential amplification, while others have similar amplification but are differentially attenuated. Switches turn off to isolate amplifier cells when the cell is not selected. Canceling circuits produce an output opposite to unselected amplifier cells, providing a sum near zero. Temperature compensation and other adjustment include two components: when the output y and the input x have the relation y=a+b log x the log-linear VGA can adjust either the offset or slope.