Example embodiments relate to Doherty amplifiers. One example includes a radiofrequency (RF) power amplifier. The RF power amplifier includes an input lead. The RF power amplifier also includes a first output lead. Additionally, the RF power amplifier includes a first semiconductor die arranged in between the input lead and the first output lead. The first semiconductor die includes a first edge arranged adjacent to the input lead and an opposing second edge arranged adjacent to the first output lead. Further, the RF power amplifier includes a field-effect transistor integrated on the first semiconductor die. The field-effect transistor includes a gate bondpad assembly and a drain bondpad assembly. The field-effect transistor also includes a plurality of gate bondwires and a plurality of drain bondwires. In addition, the field-effect transistor includes a plurality of gate fingers extending in a first direction and a plurality of drain fingers extending in a second direction.

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

A power amplifier, for a transmitter circuit is disclosed, which comprises at least one field-effect transistor having a gate terminal and a bulk terminal. The at least one field-effect transistor is configured to receive an input voltage at the gate terminal and a dynamic bias voltage at the bulk terminal. The power amplifier comprises a bias-voltage generation circuit configured to generate the dynamic bias voltage as a nonlinear function of an envelope of input signal. The input voltage is a linear function of the input signal. The bias-voltage generation circuit comprises a rectifier circuit configured to generate a rectified input voltage and an amplifier circuit, operatively connected to the rectifier circuit, configured to generate the dynamic bias voltage based on the rectified input voltage. The amplifier circuit is a variable-gain amplifier circuit and the power amplifier comprises a control circuit configured to tune the gain of the amplifier circuit.

A power amplifier, for a transmitter circuit is disclosed, which comprises at least one field-effect transistor having a gate terminal and a bulk terminal. The at least one field-effect transistor is configured to receive an input voltage at the gate terminal and a dynamic bias voltage at the bulk terminal. The power amplifier comprises a bias-voltage generation circuit configured to generate the dynamic bias voltage as a nonlinear function of an envelope of input signal. The input voltage is a linear function of the input signal. The bias-voltage generation circuit comprises a rectifier circuit configured to generate a rectified input voltage and an amplifier circuit, operatively connected to the rectifier circuit, configured to generate the dynamic bias voltage based on the rectified input voltage. The amplifier circuit is a variable-gain amplifier circuit and the power amplifier comprises a control circuit configured to tune the gain of the amplifier circuit.

An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit is formed including a plurality of protection diodes that are formed on the substrate and that are connected in series with each other, the protection circuit being connected to an output terminal of the amplifier circuit. A pad conductive layer is formed that at least partially includes a pad for connecting to a circuit outside the substrate. An insulating protective film covers the pad conductive layer. The insulating protective film includes an opening that exposes a partial area of a surface of the pad conductive layer, and that covers another area. A first bump is formed on the pad conductive layer on a bottom surface of the opening, and a second bump at least partially overlaps the protection circuit in plan view and is connected to a ground (GND) potential connected to the amplifier circuit.

An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit is formed including a plurality of protection diodes that are formed on the substrate and that are connected in series with each other, the protection circuit being connected to an output terminal of the amplifier circuit. A pad conductive layer is formed that at least partially includes a pad for connecting to a circuit outside the substrate. An insulating protective film covers the pad conductive layer. The insulating protective film includes an opening that exposes a partial area of a surface of the pad conductive layer, and that covers another area. A first bump is formed on the pad conductive layer on a bottom surface of the opening, and a second bump at least partially overlaps the protection circuit in plan view and is connected to a ground (GND) potential connected to the amplifier circuit.

The present disclosure relates to an electronic combiner circuit comprising: a DC bias input, an AC control input and a signal output; the DC bias input being arranged to receive a DC signal and couple the DC signal to the signal output in DC; the AC control input being arranged to receive an AC signal and couple the AC signal to the signal output at any frequency; the signal output being arranged to provide a combined signal for operating a quantum device; a first conductive path arranged between the AC input and the signal output; the first conductive path being such that the DC component of a signal provided at the AC input is prevented from being transmitted from the AC input to the signal output along the first conductive path; a second conductive path arranged between the AC input and the signal output; the second conductive path being such that the DC component of a signal provided at the AC input transmits from the AC input to the signal output along the second conductive path.

The present disclosure relates to an electronic combiner circuit comprising: a DC bias input, an AC control input and a signal output; the DC bias input being arranged to receive a DC signal and couple the DC signal to the signal output in DC; the AC control input being arranged to receive an AC signal and couple the AC signal to the signal output at any frequency; the signal output being arranged to provide a combined signal for operating a quantum device; a first conductive path arranged between the AC input and the signal output; the first conductive path being such that the DC component of a signal provided at the AC input is prevented from being transmitted from the AC input to the signal output along the first conductive path; a second conductive path arranged between the AC input and the signal output; the second conductive path being such that the DC component of a signal provided at the AC input transmits from the AC input to the signal output along the second conductive path.

Example embodiments relate to push-pull class E amplifiers. One example push-pull class E amplifier includes an input configured for receiving a signal to be amplified. The push-pull class E amplifier also includes an output configured for outputting the signal after amplification. Additionally, the push-pull class E amplifier includes a printed circuit board having a first dielectric layer and a second dielectric layer. Further, the push-pull class E amplifier includes a first amplifying unit and a second amplifying unit. Yet further, the push-pull class E amplifier includes a balun, a capacitive unit, a first line segment, a second line segment, a third line segment, and a fourth line segment. The first line segment and the second line segment are arranged on the first dielectric layer. A combined length of the third line segment and the fourth line segment corresponds to a quarter wavelength of an operational frequency of the amplifier.