A device includes a package body including a central flange and an amplifier module mounted to the central flange of the surface-mount device. The amplifier module includes a module substrate mounted to the central flange. The module substrate includes a first die mount window, a first circuitry on a first surface of the module substrate, a second circuitry on the first surface of the module substrate, and a first amplifier die mounted on the central flange. The first amplifier die is at least partially disposed within the first die mount window and the first amplifier die is electrically connected to the first circuitry and the second circuitry. The first circuitry is electrically connected to a first lead of the package body and the second circuitry is electrically connected to a second lead of the package body.

A circuit includes a field effect transistor (FET), a reference transistor having an output coupled to an output of the FET, an active bias circuit coupled to the reference transistor and configured to generate an input signal for the reference transistor in response to a change in drain current of the reference transistor due to carrier trapping and to apply the input signal to an input of the reference transistor, and a summing node coupled to an input of the FET and to the input of the reference transistor. The summing node adds the input signal to an input signal of the FET to compensate the carrier trapping effect.

A circuit includes a field effect transistor (FET), a reference transistor having an output coupled to an output of the FET, an active bias circuit coupled to the reference transistor and configured to generate an input signal for the reference transistor in response to a change in drain current of the reference transistor due to carrier trapping and to apply the input signal to an input of the reference transistor, and a summing node coupled to an input of the FET and to the input of the reference transistor. The summing node adds the input signal to an input signal of the FET to compensate the carrier trapping effect.

A power amplifier according to some embodiments includes a submount, a monolithic microwave integrated circuit (MMIC) die on the submount, the MMIC die including an RF transistor configured to operate at frequencies greater than 26.5 GHz, and an internal decoupling capacitor on the submount and connected to a drain of the RF transistor. The internal decoupling capacitor has a capacitance greater than 2 nF.

A power amplifier according to some embodiments includes a submount, a monolithic microwave integrated circuit (MMIC) die on the submount, the MMIC die including an RF transistor configured to operate at frequencies greater than 26.5 GHz, and an internal decoupling capacitor on the submount and connected to a drain of the RF transistor. The internal decoupling capacitor has a capacitance greater than 2 nF.

Aspects of the disclosure include a front-end module comprising one or more receive ports configured to be coupled to a transceiver, at least one low-noise amplifier configured to be coupled to the one or more receive ports, one or more antenna ports configured to be coupled to one or more respective antennas, and a multiplexer coupled to the one or more receive ports and to the one or more antenna ports, the multiplexer being configured to route a signal received at the one or more antenna ports to a selected receive port of the one or more receive ports.

One aspect of this disclosure is a power amplifier module that includes a power amplifier, a semiconductor resistor, a tantalum nitride terminated through wafer via, and a conductive layer electrically connected to the power amplifier. The semiconductor resistor can include a resistive layer that includes a same material as a layer of a bipolar transistor of the power amplifier. A portion of the conductive layer can be in the tantalum nitride terminated through wafer via. The conductive layer and the power amplifier can be on opposing sides of a semiconductor substrate. Other embodiments of the module are provided along with related methods and components thereof.

One aspect of this disclosure is a power amplifier module that includes a power amplifier, a semiconductor resistor, a tantalum nitride terminated through wafer via, and a conductive layer electrically connected to the power amplifier. The semiconductor resistor can include a resistive layer that includes a same material as a layer of a bipolar transistor of the power amplifier. A portion of the conductive layer can be in the tantalum nitride terminated through wafer via. The conductive layer and the power amplifier can be on opposing sides of a semiconductor substrate. Other embodiments of the module are provided along with related methods and components thereof.

The present disclosure relates to systems and methods for operating transceiver circuitry to transmit or receive signals on various frequency ranges. To do so, a transmitter or a receiver of the transceiver circuitry is selectively coupled to or uncoupled from an antenna of the transceiver circuitry. Additionally, radio frequency filters may be individually or collectively coupled to and/or uncoupled from the antenna to filter different frequencies in the transmitting or receiving signals.

The present disclosure relates to systems and methods for operating transceiver circuitry to transmit or receive signals on various frequency ranges. To do so, a transmitter or a receiver of the transceiver circuitry is selectively coupled to or uncoupled from an antenna of the transceiver circuitry. Additionally, radio frequency filters may be individually or collectively coupled to and/or uncoupled from the antenna to filter different frequencies in the transmitting or receiving signals.