H03F3/213

Symmetrical Doherty power amplifier having improved efficiency

Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an “off” state to an “on” state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.

PASSIVE TUNABLE ON-CHIP LOAD MODULATION NETWORK FOR HIGH-EFFICIENCY POWER AMPLIFIERS
20230353105 · 2023-11-02 ·

A passive, tunable on-chip load modulation network for a high-efficiency power amplifier includes a ring transmission line. An output is connected to a first point on the ring transmission line. A first switched input is connected to a second point on the ring transmission line, the second point being located on the ring transmission line to provide a first impedance transformation. A second switched input is connected to a third point on the ring transmission line, the third point being located to provide a second impedance transformation that is unique from the first impedance transformation.

PASSIVE TUNABLE ON-CHIP LOAD MODULATION NETWORK FOR HIGH-EFFICIENCY POWER AMPLIFIERS
20230353105 · 2023-11-02 ·

A passive, tunable on-chip load modulation network for a high-efficiency power amplifier includes a ring transmission line. An output is connected to a first point on the ring transmission line. A first switched input is connected to a second point on the ring transmission line, the second point being located on the ring transmission line to provide a first impedance transformation. A second switched input is connected to a third point on the ring transmission line, the third point being located to provide a second impedance transformation that is unique from the first impedance transformation.

Substrate comprising an inductor and a capacitor located in an encapsulation layer

A package that includes a power amplifier and a substrate coupled to the power amplifier. The substrate includes an encapsulation layer, a capacitor device located in the encapsulation layer, an inductor located in the encapsulation layer, at least one first dielectric layer coupled to a first surface of the encapsulation layer, and a plurality of first interconnects coupled to the first surface of the encapsulation layer. The plurality of first interconnects is located at least in the at least one first dielectric layer. The plurality of first interconnects is coupled to the capacitor device and the inductor. The inductor and the capacitor device are configured to be electrically coupled together to operate as elements of a matching network for the power amplifier. The capacitor device is configured to be coupled to ground.

Substrate comprising an inductor and a capacitor located in an encapsulation layer

A package that includes a power amplifier and a substrate coupled to the power amplifier. The substrate includes an encapsulation layer, a capacitor device located in the encapsulation layer, an inductor located in the encapsulation layer, at least one first dielectric layer coupled to a first surface of the encapsulation layer, and a plurality of first interconnects coupled to the first surface of the encapsulation layer. The plurality of first interconnects is located at least in the at least one first dielectric layer. The plurality of first interconnects is coupled to the capacitor device and the inductor. The inductor and the capacitor device are configured to be electrically coupled together to operate as elements of a matching network for the power amplifier. The capacitor device is configured to be coupled to ground.

DPD APPARATUS AND METHOD APPLICABLE TO 5G BROADBAND MIMO SYSTEM
20230361722 · 2023-11-09 ·

The present disclosure relates to the technical field of wireless communications, in particular, a digital predistortion (DPD) apparatus applicable to a 5G broadband multiple-input multiple-output (MIMO) system. The DPD apparatus includes a data processing module, a digital-to-analog conversion module, a signal output module, a signal feedback module, and an analog-to-digital conversion module; the signal feedback module is to ensure that at least two feedback paths are directed to a DPD feedback signal. The first feedback path is a main feedback loop, and the second feedback path is an auxiliary feedback loop. The present disclosure has the advantages of occupying a few of hardware resources, being capable of monitoring a DPD feedback loop signal in real time, and making a response in time.

DPD APPARATUS AND METHOD APPLICABLE TO 5G BROADBAND MIMO SYSTEM
20230361722 · 2023-11-09 ·

The present disclosure relates to the technical field of wireless communications, in particular, a digital predistortion (DPD) apparatus applicable to a 5G broadband multiple-input multiple-output (MIMO) system. The DPD apparatus includes a data processing module, a digital-to-analog conversion module, a signal output module, a signal feedback module, and an analog-to-digital conversion module; the signal feedback module is to ensure that at least two feedback paths are directed to a DPD feedback signal. The first feedback path is a main feedback loop, and the second feedback path is an auxiliary feedback loop. The present disclosure has the advantages of occupying a few of hardware resources, being capable of monitoring a DPD feedback loop signal in real time, and making a response in time.

Power amplifier output matching

A semiconductor-on-insulator die can include a power amplifier configured to amplify a radio frequency input signal having a fundamental frequency. The die can further include an output matching circuit including first and second second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency and a third order harmonic rejection circuit configured to resonate at about three times the fundamental frequency.

Power amplifier output matching

A semiconductor-on-insulator die can include a power amplifier configured to amplify a radio frequency input signal having a fundamental frequency. The die can further include an output matching circuit including first and second second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency and a third order harmonic rejection circuit configured to resonate at about three times the fundamental frequency.

Power amplifier equalizer
11817827 · 2023-11-14 · ·

Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.