A gallium nitride-based RF transistor amplifier comprises a semiconductor layer structure comprising a barrier layer on a channel layer, first and second source/drain regions in the semiconductor layer structure, first and second source/drain contacts on the respective first and second source/drain regions, and a longitudinally-extending gate finger that is between the first and second source/drain contacts. The first and second source/drain contacts each has an inner sidewall that faces the gate finger and an opposed outer sidewall. The first source/drain region extends a first distance from a lower edge of the inner sidewall of the first source/drain contact towards the second source/drain region along a transverse axis that extends parallel to a plane defined by the upper surface of the semiconductor layer structure, and extends a second, smaller distance from a lower edge of the outer sidewall of the first source/drain contact away from the second source/drain region.

Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.

Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.

SOI-based technology platforms are described that provide fully integrated front end integrated circuits (FEICs) that include switches, low-noise amplifiers (LNAs), and power amplifiers (PAs). The PAs can be built in a thick film region of the integrated circuit, resulting in a partially depleted silicon-on-insulator (PDSOI) PA, and the switches and LNAs can be built in a thin film region of the integrated circuit, resulting in fully depleted silicon-on-insulator (FDSOI) switches and LNAs. The resulting fully integrated FEIC includes PDSOI PAs with FDSOI switches and LNAs. Passive components can be built in the thick film region, the thin film region, or both regions.

SOI-based technology platforms are described that provide fully integrated front end integrated circuits (FEICs) that include switches, low-noise amplifiers (LNAs), and power amplifiers (PAs). The PAs can be built in a thick film region of the integrated circuit, resulting in a partially depleted silicon-on-insulator (PDSOI) PA, and the switches and LNAs can be built in a thin film region of the integrated circuit, resulting in fully depleted silicon-on-insulator (FDSOI) switches and LNAs. The resulting fully integrated FEIC includes PDSOI PAs with FDSOI switches and LNAs. Passive components can be built in the thick film region, the thin film region, or both regions.

Certain aspects of the present disclosure provide an amplifier. The amplifier generally includes an amplifier core circuit configured to amplify a radio frequency signal and having a first output and a second output; a transformer coupled to the amplifier core circuit, the transformer having a primary winding and a secondary winding, the primary winding being coupled to the first output and the second output of the amplifier core circuit, the secondary winding being coupled to an output node of the amplifier; and a variable resistance circuit coupled in parallel with the primary winding.

A 3D integrated circuit (3D IC) chip is described. The 3D IC chip includes a die having a compound semiconductor high electron mobility transistor (HEMT) active device. The compound semiconductor HEMT active device is composed of compound semiconductor layers on a single crystal, compound semiconductor layer. The 3D IC chip also includes an acoustic device integrated in the single crystal, compound semiconductor layer. The 3D IC chip further includes a passive device integrated in back-end-of-line layers of the die on the single crystal, compound semiconductor layer.

A 3D integrated circuit (3D IC) chip is described. The 3D IC chip includes a die having a compound semiconductor high electron mobility transistor (HEMT) active device. The compound semiconductor HEMT active device is composed of compound semiconductor layers on a single crystal, compound semiconductor layer. The 3D IC chip also includes an acoustic device integrated in the single crystal, compound semiconductor layer. The 3D IC chip further includes a passive device integrated in back-end-of-line layers of the die on the single crystal, compound semiconductor layer.

The present invention relates to a high-frequency semiconductor device. A conventional high-frequency semiconductor device including an input second-order harmonic matching circuit has such a problem that gain decrease occurs. In a high-frequency semiconductor device (100) of the present invention, two adjacent unit transistor cells (7) and (8) are connected to one input second-order harmonic matching circuit (19) provided on an upper surface of a semiconductor substrate (1). The input second-order harmonic matching circuit (19) includes a first capacitor (13), a first inductor (14), a second capacitor (15), and a second inductor (16). The first capacitor (13) and the first inductor (14) resonate at the frequency of a fundamental wave, and each of impedances as seen by input electrodes of the two unit transistor cells (7) and (8) is short-circuited at the frequency of a second-order harmonic.

A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the “click and pop” sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.