H03F3/213

MULTIPLE-STAGE DOHERTY POWER AMPLIFIERS IMPLEMENTED WITH MULTIPLE SEMICONDUCTOR TECHNOLOGIES

A device includes an integrated circuit (IC) die. The IC die includes a silicon germanium (SiGe) substrate, a first RF signal input terminal, a first RF signal output terminal, a first amplification path between the first RF signal input terminal and the first RF signal output terminal, a second RF signal input terminal, a second RF signal output terminal, and a second amplification path between the second RF signal input terminal and the second RF signal output terminal. The device includes a first power transistor die including a first input terminal electrically connected to the first RF signal output terminal and a second power transistor die including a second input terminal electrically connected to the second RF signal output terminal. The first amplification path can include two heterojunction bipolar transistors (HBTs) connected in a cascode configuration and the second amplification path can include two HBTs connected in a cascode configuration.

Envelope tracking integrated circuit supporting multiple types of power amplifiers
11539330 · 2022-12-27 · ·

An envelope tracking (ET) integrated circuit (ETIC) supporting multiple types of power amplifiers. The ETIC includes a pair of tracker circuits configured to generate a pair of low-frequency currents at a pair of output nodes, respectively. The ETIC also includes a pair of ET voltage circuits configured to generate a pair of ET voltages at the output nodes, respectively. In various embodiments disclosed herein, the ETIC can be configured to generate the low-frequency currents independent of what type of power amplifier is coupled to the output nodes. Concurrently, the ETIC can also generate the ET voltages in accordance with the type of power amplifier coupled to the output nodes. As such, it is possible to support multiple types of power amplifiers based on a single ETIC, thus helping to reduce footprint, power consumption, and heat dissipation in an electronic device employing the ETIC and the multiple types of power amplifiers.

Envelope tracking integrated circuit supporting multiple types of power amplifiers
11539330 · 2022-12-27 · ·

An envelope tracking (ET) integrated circuit (ETIC) supporting multiple types of power amplifiers. The ETIC includes a pair of tracker circuits configured to generate a pair of low-frequency currents at a pair of output nodes, respectively. The ETIC also includes a pair of ET voltage circuits configured to generate a pair of ET voltages at the output nodes, respectively. In various embodiments disclosed herein, the ETIC can be configured to generate the low-frequency currents independent of what type of power amplifier is coupled to the output nodes. Concurrently, the ETIC can also generate the ET voltages in accordance with the type of power amplifier coupled to the output nodes. As such, it is possible to support multiple types of power amplifiers based on a single ETIC, thus helping to reduce footprint, power consumption, and heat dissipation in an electronic device employing the ETIC and the multiple types of power amplifiers.

Capacitive sensor assemblies and electrical circuits therefor

A sensor assembly including a capacitive sensor, like a microelectromechanical (MEMS) microphone, and an electrical circuit therefor are disclosed. The electrical circuit includes a first transistor having an input gate connectable to the capacitive sensor, a second transistor having an input gate coupled to an output of the first transistor, a feedforward circuit interconnecting a back-gate of the second transistor and the output of the first transistor, and a filter circuit interconnecting the output of the first transistor and the input gate of the second transistor.

Capacitive sensor assemblies and electrical circuits therefor

A sensor assembly including a capacitive sensor, like a microelectromechanical (MEMS) microphone, and an electrical circuit therefor are disclosed. The electrical circuit includes a first transistor having an input gate connectable to the capacitive sensor, a second transistor having an input gate coupled to an output of the first transistor, a feedforward circuit interconnecting a back-gate of the second transistor and the output of the first transistor, and a filter circuit interconnecting the output of the first transistor and the input gate of the second transistor.

SEMICONDUCTOR DEVICE AND POWER AMPLIFIER

A semiconductor device includes: a substrate; a channel layer disposed on the substrate, wherein the channel layer is made of GaN; a barrier layer disposed on the channel layer, wherein the barrier layer is made of Al.sub.zGa.sub.1-zN; and an inserting structure inserted between the channel layer and the barrier layer. The inserting structure includes: a first inserting layer disposed on the channel layer, wherein the first inserting layer is made of Al.sub.xGa.sub.1-xN; and a second inserting layer disposed on the first inserting layer, wherein the second inserting layer is made of Al.sub.yGa.sub.1-yN, and y is greater than x. The semiconductor device further includes: a gate electrode disposed on the barrier layer; a source electrode and a drain electrode disposed on the barrier layer and respectively at opposite sides of the gate electrode; and a spike region formed below at least one of the source electrode and the drain electrode.

Systems and methods of compensating for narrowband distortion in power semiconductor devices

Some embodiments herein describe a radio frequency power semiconductor device that include a first non-linear filter network for compensating for lower frequency noise of a power amplifier. The first non-linear filter network can include a plurality of infinite impulse response filters and corresponding corrective elements to correct for a non-linear portion of the power amplifier. The radio frequency power semiconductor device can further include a second non-linear filter network for compensating for broadband distortion. The second non-linear filter network can be connected in parallel to the first non-linear filter network. The broadband distortion can include digital predistortion and the narrowband distortion can include charge trapping effects. The first non-linear filter network can comprise Laguerre filters. The second non-linear filter network can comprise general memory polynomial filters.

Mismatch detection using replica circuit

An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.

Mismatch detection using replica circuit

An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.

Compact RFIC with stacked inductor and capacitor
11522506 · 2022-12-06 · ·

Various embodiments relate to an integrated circuit including a transistor device having input and output terminals, and an inductor-capacitor (LC) circuit coupled to one of the terminals of the transistor device. The LC circuit includes a capacitor having a top plate and a bottom plate, a inductor having a coil structure, and a connector configured to couple the inductor and an interior portion the top plate of the capacitor. The inductor at least partially overlaps the capacitor.