Some embodiments herein describe a radio frequency power semiconductor device that include a first non-linear filter network for compensating for lower frequency noise of a power amplifier. The first non-linear filter network can include a plurality of infinite impulse response filters and corresponding corrective elements to correct for a non-linear portion of the power amplifier. The radio frequency power semiconductor device can further include a second non-linear filter network for compensating for broadband distortion. The second non-linear filter network can be connected in parallel to the first non-linear filter network. The broadband distortion can include digital predistortion and the narrowband distortion can include charge trapping effects. The first non-linear filter network can comprise Laguerre filters. The second non-linear filter network can comprise general memory polynomial filters.

An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (IC) (ETIC) and a distributed ETIC (DETIC) coupled to the ETIC. The DETIC may be configured to provide a distributed voltage to a distributed amplifier circuit for amplifying a distributed radio frequency (RF) signal. In examples discussed herein, the ETIC is configured to generate a low-frequency current, which can affect the distributed voltage, at a desired level based on a feedback signal received from the DETIC. The DETIC may be configured to generate the feedback signal based on an indication(s) related to the distributed voltage. By dynamically adjusting the low-frequency current, and thus the distributed voltage, based on the feedback signal, it may be possible to maintain operating efficiency of the distributed amplifier circuit across a wider range of modulation bandwidth with minimal cost and/or size impact on the ET amplifier apparatus.

An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (IC) (ETIC) and a distributed ETIC (DETIC) coupled to the ETIC. The DETIC may be configured to provide a distributed voltage to a distributed amplifier circuit for amplifying a distributed radio frequency (RF) signal. In examples discussed herein, the ETIC is configured to generate a low-frequency current, which can affect the distributed voltage, at a desired level based on a feedback signal received from the DETIC. The DETIC may be configured to generate the feedback signal based on an indication(s) related to the distributed voltage. By dynamically adjusting the low-frequency current, and thus the distributed voltage, based on the feedback signal, it may be possible to maintain operating efficiency of the distributed amplifier circuit across a wider range of modulation bandwidth with minimal cost and/or size impact on the ET amplifier apparatus.

An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.

An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

Power amplifier (PA) packages containing peripherally-encapsulated dies are provided, as are methods for fabricating such PA packages. In embodiments, a method for fabricating a PA package includes obtaining a die-substrate assembly containing a radio frequency (RF) power die, a package substrate, and a die bond layer. The die bond layer is composed of at least one metallic constituent and electrically couples a backside of the RF power die to the package substrate. A peripheral encapsulant body is formed around the RF power die and covers at least a portion of the die bond layer, while leaving at least a majority of a frontside of the RF power die uncovered. Before or after forming the peripheral encapsulant body, terminals of the PA package are interconnected with the RF power die; and a cover piece is bonded to the die-substrate assembly to enclose a gas-containing cavity within the PA package.

Power amplifier (PA) packages containing peripherally-encapsulated dies are provided, as are methods for fabricating such PA packages. In embodiments, a method for fabricating a PA package includes obtaining a die-substrate assembly containing a radio frequency (RF) power die, a package substrate, and a die bond layer. The die bond layer is composed of at least one metallic constituent and electrically couples a backside of the RF power die to the package substrate. A peripheral encapsulant body is formed around the RF power die and covers at least a portion of the die bond layer, while leaving at least a majority of a frontside of the RF power die uncovered. Before or after forming the peripheral encapsulant body, terminals of the PA package are interconnected with the RF power die; and a cover piece is bonded to the die-substrate assembly to enclose a gas-containing cavity within the PA package.

A bias compensation circuit, coupled to an amplifying circuit, is disclosed. The bias compensation circuit comprises a transistor, comprising a first terminal, a second terminal and a control terminal; a first feedback transistor, comprising a control terminal, coupled to the first terminal of the transistor; a first terminal, coupled to the control terminal of the transistor; and a second terminal; and a second feedback transistor, comprising a control terminal, coupled to the first terminal of the transistor; a first terminal, coupled to the amplifying circuit; and a second terminal; and a first resistor, comprising a first terminal, coupled to the first terminal of the transistor; and a second terminal, configured to receive a first voltage.